mt90224 Zarlink Semiconductor, mt90224 Datasheet - Page 103

• Manufacturer Part Number: mt90224
• Description: 8-port Ima/tc Phy Device
• Manufacturer: Zarlink Semiconductor

Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Synchronized access Set address before the transfer is initiated with the RX External SRAM Control
Reset Value (Hex):
Address (Hex):
Synchronized access Set address before the transfer is initiated with the RX External SRAM Control
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
15:14
Bit #
Bit #
Bit #
13:0
15:4
15:0
Bit #
15:9
3:0
4:3
8
7
6
5
Type
Type
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
Unused. Read all 0’s
Guardband delay value on startup of an IMA Group or Delay value to add or substract
when IMA Group is operational
Unused. Read all 0’s
RX External SRAM Read/Write Address bit 19:16.
RX External SRAM Read/Write Address bit 15:0.
Unused, Read all 0’s
Write a 1 for MT90223/222 memory optimization
Write a 1 to reset the receiver
Write a 1 to reset the transmitter
Write a 1 to reset counters
Write 00 for normal operation.
register
0x0287 - 0x028E
1 value for each IMA Group to use for start-up and adding/removing delay (value
in number of cells).
0004
0x0297 (1 reg)
0000
0x0298
register
0000
0x0299
Defines the external SRAM configuration.
0000
Table 68 - RX External SRAM Read/Write Address 1
Table 67 - RX External SRAM Read/Write Address
Table 66 - RX Guardband/Delta Delay Register
(1 reg)
(1 reg)
Table 69 - SRAM Control Register
Zarlink Semiconductor Inc.
(8 reg)
MT90222/3/4
1
. Write 0 for normal operation.
1
. 0 means no action.
103
1
. 0 means no action.
Description
Description
Description
Description
2
. 0 means normal operation.
Data Sheet