zl50018gag2 Zarlink Semiconductor, zl50018gag2 Datasheet - Page 87

• Manufacturer Part Number: zl50018gag2
• Description: 2 K Digital Switch With Enhanced Stratum 3 Dpll
• Manufacturer: Zarlink Semiconductor

External Read/Write Address: 0067
Reset Value: 000F
15 - 4
External Read/Write Address: 0068
Reset Value: 0000
15 - 4
15
3 - 0
0
Bit
Bit
3
2
1
0
15
0
14
0
14
0
Unused
Name
RIM
HIM
SIM
ICB3 - 0
LIM
Unused
Name
H
13
0
H
13
0
Reserved. In normal functional mode, these bits MUST be set to zero.
Lock Interrupt Mask Bit: When this bit is high, it masks the lock status change
interrupt.
Reference Change Interrupt Mask Bit: When this bit is high, it masks the reference
change interrupt.
Holdover Interrupt Mask Bit: When this bit is high, it masks the holdover entry/exit
interrupt.
Slew Rate Limiter Interrupt Mask Bit: When this bit is high, it masks the slew rate
interrupt.
12
0
12
0
Reserved. In normal functional mode, these bits MUST be set to zero.
Interrupt Clear Bits: Writing a “1” to any bit in this register will clear the
corresponding bit in the Interrupt Register (IR). The Interrupt Clear Register is
self-clearing, i.e., once it has completed its action, the ICR register bit returns to 0.
H
11
Table 55 - Interrupt Mask Register (IMR) Bits
0
H
11
Table 56 - Interrupt Clear Register (ICR) Bits
0
10
0
10
0
9
0
9
Zarlink Semiconductor Inc.
0
ZL50018
8
0
8
0
87
7
0
7
0
Description
Description
6
0
6
0
5
0
5
0
4
0
4
0
LIM
3
ICB
3
3
RIM
2
ICB
2
2
HIM
1
ICB
Data Sheet
1
1
SIM
0
ICB
0
0