zl50063 Zarlink Semiconductor, zl50063 Datasheet - Page 41

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zl50063

Manufacturer Part Number
zl50063
Description
16k-channel Digital Switch With High Jitter Tolerance, Single Rate 32mbps , And 32 Inputs And 32 Output
Manufacturer
Zarlink Semiconductor
Datasheet
13.5
Addresses 0083
Sixteen Local Output Advancement Registers (LOAR0 to LOAR15) allow users to program the output advancement
for output data streams LSTo0 to LSTo15. The possible adjustment is -1 (7.6ns), -2 (15ns) or -3 (23ns) cycles of the
internal system clock (131.072MHz).
The LOAR0 to LOAR15 registers are configured as follows:
13.5.1
The binary value of these two bits indicates the amount of offset that a particular stream output can be advanced
with respect to the output frame boundary. When the advancement is 0, the serial output stream has the normal
alignment with the generated frame pulse FP8o.
(where n = 0 to 15)
Local Output Advancement Registers (LOAR0 to LOAR15)
Local Output Advancement Bits 1-0 (LOA1-LOA0)
LOARn Bit
15:2
1:0
H
to 0092
Table 18 - Local Output Advancement (LOAR) Programming Table
Table 17 - Local Output Advancement Register (LOAR) Bits
H
.
Local Output Advancement
Clock Rate 131.072 MHz
Reserved
LOA[1:0]
-2 cycles (~15ns)
-3 cycles (~23ns)
-1 cycle (~7.6ns)
Name
0 (Default)
Zarlink Semiconductor Inc.
ZL50063
Reset
Value
0
0
41
Reserved
Must be set to 0 for normal operation
Local Output Advancement Value
Advancement Bits
LOA1
Corresponding
0
0
1
1
Description
LOA0
0
1
0
1
Data Sheet

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