zl50415 Zarlink Semiconductor, zl50415 Datasheet - Page 119
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zl50415
Manufacturer Part Number
zl50415
Description
Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50415.pdf
(163 pages)
- Current page: 119 of 163
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Fast Ethernet Access Ports [15:0] RMII
R28
P28
R29
AF21, AJ19, AF18, AJ17,
AJ15, AF15, AJ13, AF12,
AJ11, AJ9, AF9, AJ7, AF6,
AJ5, AJ3, AF1
AE21, AH19, AH20, AH17,
AH15, AE15, AH13, AE12,
AH11, AH9, AE9, AH7, AE6,
AH5, AH2, AF2
AH21, AF19, AF17, AG17,
AG15, AF14, AG13, AF11,
AG11, AG9, AF8, AG7, AF5,
AG5, AH3, AF3
AJ18, AJ21, AJ16, AJ14,
AE14, AJ12, AE11, AJ10,
AJ8, AE8, AJ6, AE5, AJ4,
AG1, AE1
AE18, AG18, AE16, AG16,
AG14, AE13, AG12, AE10,
AG10, AG8, AE7, AG6, AE4,
AG4, AG3, AE3
AG19, AH18, AF16, AH16,
AH14, AF13, AH12, AF10,
AH10, AH8, AF7, AH6, AF4,
AH4, AG2, AE2
GMII/TBI GiGabit Ethernet Access Ports 0 & 1
Y27, Y26, AA26, AA25,
AB26, AB25, AC26, AC25,
AD26, AD25
T28
U28
R25
U29
T29
Ball No(s)
M_MDC
M_MDIO
M_CLKI
M[15:0]_RXD[1]
M[15:0]_RXD[0]
M[15:0]_CRS_
DV
M[15:0]_TXEN
M[15:0]_TXD[1]
M[15:0]_TXD[0]
M25_TXD[9:0]
M25_RX_DV
M25_RX_ER
M25_CRS
M25_COL
M25_RXCLK
Symbol
Zarlink Semiconductor Inc.
ZL50418
Output
I/O-TS with pull up
Input
Input with weak
internal pull up
resistors.
Input with weak
internal pull up
resistors
Input with weak
internal pull down
resistors.
I/O- TS with pull up,
slew
Output, slew
Output, slew
Output
Input w/ pull down
Input w/ pull up
Input w/ pull down
Input w/ pull up
Input w/ pull up
119
I/O
MII Management Data Clock –
(Common for all MII Ports [15:0])
MII Management Data I/O –
(Common for all MII Ports
–[15:0]))
Reference Input Clock
Ports [15:0] – Receive Data Bit [1]
Ports [15:0] – Receive Data Bit [0]
Ports [15:0] – Carrier Sense and
Receive Data Valid
Ports [15:0] – Transmit Enable
Strap option for RMII/GPSI
Ports [15:0] – Transmit Data Bit
[1]
Ports [15:0] – Transmit Data Bit
[0]
Transmit Data Bit [9:0]
Receive Data Valid
Receive Error
Carrier Sense
Collision Detected
Receive Clock
Description
Data Sheet
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