zl50415 Zarlink Semiconductor, zl50415 Datasheet - Page 22
zl50415
Manufacturer Part Number
zl50415
Description
Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50415.pdf
(163 pages)
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4.3
To speed up searching and decrease memory latency, the external MAC address database is duplicated in both
memory banks. To support 64 K MAC address, 4 MB memory is required. When VLAN support is enabled, 512
entries of the MAC address table are used for storing the VLAN ID at VLAN Index Mapping Table.
Up to 2 K Ethernet frame buffers are supported and they will use 3 MB of memory. Each frame uses 1536 bytes.
The maximum system memory requirement is 4 MB. If less memory is desired, the configuration can scale down.
Memory Configuration
Memory Map
Memory Requirements
Bank A
1 M
1 M
2 M
2 M
Bank B
Tag based VLAN Enable
4 K
Tag based VLAN Disable
1 M Bank A
0.25 M -4 K
1 M Bank A
1 M
1 M
2 M
2 M
0.75 M
0.75 M
0.25 M
4 K
1 M Bank B
1 M Bank B
0.25 M-
0.75 M
0.75 M
0.25 M
Tag based VLAN
Table 1 - Memory Configuration
Disable
Disable
Enable
Enable
Zarlink Semiconductor Inc.
Figure 7 - Memory Map
ZL50418
22
Tag based VLAN Enable
4 K
2 M Bank A
2 M Bank A
0.5 M -4 K
Frame Data Buffer (FDR) Area
MAC Address Control Table (MCT) Area
VLAN Table Area
1.5 M
0.5 M
1.5 M
Frame Buffer
4 K
2 M Bank B
1 K
1 K
2 K
2 K
2 M Bank B
0.5 M-
1.5 M
0.5 M
1.5 M
Max MAC Address
31.5 K
63.5 K
32 K
64 K
Data Sheet
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