zl50415 Zarlink Semiconductor, zl50415 Datasheet - Page 95

• Manufacturer Part Number: zl50415
• Description: Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
• Manufacturer: Zarlink Semiconductor

•
•
•
QOSC40 through QOSC47 represents the set of WFQ parameters for Gigabit port 24. The granularity of the
numbers is 1 and their sum must be 64. QOSC47 corresponds to W7, and QOSC40 corresponds to W0.
14.9.35
Accessed by CPU and serial interface
•
•
•
•
•
•
•
•
QOSC48 through QOSC55 represents the set of WFQ parameters for Gigabit port 2. The granularity of the
numbers is 1 and their sum must be 64. QOSC55 corresponds to W7 and QOSC48 corresponds to W0.
14.9.36
Accessed by CPU and serial interface
QOSC56[5:0] – TOKEN_RATE_G1 (CPU Address 54f). Programs de average rate for gigabit port 1. When equal to
0, shaper is disable. Granularity is 1.
QOSC57[7:0] – TOKEN_LIMIT_G1 (CPU Address 550). Programs the maximum counter for gigabit port 1.
Granularity is 16 bytes.
Shaper is implemented to control the peak and average rate for outgoing traffic with priority 6 (queue 6). Shaper is
limited to gigabit ports and queue P6 when it is in strict priority. QOSC41 programs the peak rate for gigabit port 1.
See Programming QoS Registers Application Note for more information
14.9.37
Accessed by CPU and serial interface
QOSC58[5:0] – TOKEN_RATE_G2 (CPU Address 551). Programs de average rate for gigabit port 2. When equal
to 0, shaper is disable. Granularity is 1.
QOSC59[7:0] – TOKEN_LIMIT_G2 (CPU Address 552). Programs the maximum counter for gigabit port 2.
Granularity is 16 bytes.
Shaper is implemented to control the peak and average rate for outgoing traffic with priority 6 (queue 6). Shaper is
limited to gigabit ports and queue P6 when it is in strict priority. QOSC49 programs the peak rate for gigabit port 2.
See Programming QoS Register Application Note for more information.
W5 - QOSC45[5:0] – CREDIT_C5_G1 (CPU Address 544)
W6 - QOSC46[5:0] – CREDIT_C6_G1 (CPU Address 545)
W7 - QOSC47[5:0] – CREDIT_C7_G1 (CPU Address 546)
W0 - QOSC48[5:0] – CREDIT_C0_G2(CPU Address 547)
W1 - QOSC49[5:0] – CREDIT_C1_G2(CPU Address 548)
W2 - QOSC50[5:0] – CREDIT_C2_G2(CPU Address 549)
W3 - QOSC51[5:0] – CREDIT_C3_G2(CPU Address 54a)
W4 - QOSC52[5:0] – CREDIT_C4_G2(CPU Address 54b)
W5 - QOSC53[5:0] – CREDIT_C5_G2(CPU Address 54c)
W6 - QOSC54[5:0] – CREDIT_C6_G2(CPU Address 54d)
W7 - QOSC55[5:0] – CREDIT_C7_G2(CPU Address 54e)
Classes WFQ Credit Port G2
Class 6 Shaper Control Port G1
Class 6 Shaper Control Port G2
[7:6]:
[7]: Priority service allow flow control for the ports select this parameter set.
[6]: Flow control pause best effort traffic only
Priority service type. Option 1 to 4
Zarlink Semiconductor Inc.
ZL50418
95
Data Sheet