uaa3535hl NXP Semiconductors, uaa3535hl Datasheet - Page 9
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uaa3535hl
Manufacturer Part Number
uaa3535hl
Description
Low Power Gsm/dcs/pcs Multi-band Transceiver
Manufacturer
NXP Semiconductors
Datasheet
1.UAA3535HL.pdf
(24 pages)
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Table 11 Register bit allocation; notes 1 and 2 and 3
Notes
1. The 15-bit RF divider is programmable through the 15 bits RF0 to RF14, in steps of 100 kHz.
2. X = don’t care.
3. The 6-bit AGC attenuator is programmable through the 6 bits G0 to G5 in 17 steps of 4 dB (see Table 13).
Table 12 Preset values; note 1
Note
1. X = don’t care.
BIT
BIT
16
16
X
X
X
X
X
X
BIT
BIT
15
15
X
X
X
X
X
X
BIT
BIT
RF
14
14
14
X
X
1
X
X
BIT
BIT
RF
13
13
13
X
X
0
0
0
for test purpose only; bit usage to be defined; this is a forbidden address
for test purpose only; bit usage to be defined; this is a forbidden address
FILT
BIT
BIT
RF
12
12
12
X
X
0
0
REF
BIT
DIV
BIT
RF
11
11
11
0
1
0
0
IFO
BIT
BIT
RF
10
10
10
0
0
0
1
BIT
DIV
BIT
RF
IF
9
9
0
9
1
0
1
DATA FIELD
DATA FIELD
REGISTER ALLOCATION
REGISTER ALLOCATION
BIT
TXI
BIT
RF
8
8
0
8
0
0
0
SBD
BIT
BIT
RF
7
7
0
7
0
0
1
BND
LNA
BIT
BIT
RF
6
6
6
0
1
0
BIT
BIT
RF
G5
5
5
1
5
0
1
1
BIT
BIT
RF
G4
4
4
1
4
0
1
1
TXIF
BIT
ON
BIT
RF
G3
3
3
3
0
1
0
SYN
BIT
BIT
ON
RF
G2
2
2
2
1
1
0
BIT
BIT
RX
ON
RF
G1
1
1
1
1
1
0
BIT
ON
BIT
RF
G0
TX
0
0
0
0
1
0
LAST 4 BITS
LAST 4 BITS
0
0
0
0
0
0
0
0
ADDRESS
ADDRESS
FIELD
FIELD
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0