oq2541bhp NXP Semiconductors, oq2541bhp Datasheet - Page 11

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oq2541bhp

Manufacturer Part Number
oq2541bhp
Description
Oq2541bhp; Oq2541bu Sdh/sonet Data And Clock Recovery Unit Stm1/4/16 Oc3/12/48 Ge
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Table 3 STM mode select
Application with positive supply voltage
The versatile design of the OQ2541B also allows it to
operate in a positive supply voltage application, although
some pins have a different mode of operation. This section
deals with these differences and supports the user with
achieving a successful application of the OQ2541B in a
5 V environment.
A
Fig.32 shows a sample application diagram. It should be
noted that all pins GND are now connected to V
pins V
power controller.
O
In a positive supply voltage application, the functions of
pins ENL, ALLON and BYPASS are different than in a
negative supply application, see also Table 4.
The functions can be activated by a voltage more than
2.0 V lower than 5.0 V (V
connected to V
below V
of V
If the pin is connected to GND (0 V) in the negative supply
application, it should now be connected to 5.0 V (the
voltage on pins GND). If the pin is connected to a positive
voltage >0.8 V in the negative supply application, then it
should be connected to V
below V
BYPASS to a voltage lower than that on pin 25, because
this causes serious damage to the OQ2541B.
2000 Sep 18
Do not connect pins ENL, ALLON or BYPASS to ground,
because this will destroy the IC.
STM1/OC3
STM4/OC12
Gigabit Ethernet
STM16/OC48
PPLICATION DIAGRAM
UTPUT SELECTION
SDH/SONET data and clock recovery unit
STM1/4/16 OC3/12/48 GE
CC
EE
MODE
(5.0 V), the functions are deactivated.
CC
CC
are connected to the regulated voltage from the
. If the pins do not differ by more than 0.8 V
). Beware not to connect pins ENL, ALLON or
EE
(pin 25), which is approximately 3.3 V
CAUTION
BIT RATE
(Mbits/s)
CC
1250.00
2488.32
EE
155.52
622.08
). Preferably, they should be
(pin 25, approximately 3.3 V
DIVISION
FACTOR
CC
16
4
2
1
and all
11
L
In the negative supply application, pins LOS and LOCK
are open-collector outputs that require pull-up resistors to
a positive supply voltage.
In the positive supply application, the pull-up voltage
needs to be higher than the positive supply voltage and the
signals on pins LOS and LOCK would no longer be
TTL compatible. However, the internal circuit on pins LOS
and LOCK can be used in a current mirror configuration
(see Fig.9). This requires only an external PNP transistor
(e.g. BC857 or equivalent) to mirror the current. A 10 k
pull-down resistor from the collector of the external
transistor to ground yields a TTL compatible signal again,
albeit inverted. Table 5 shows the meaning of the LOS and
LOCK flags, when used in the positive supply application.
handbook, halfpage
OSS OF SIGNAL AND LOCK DETECTION
DOUT155
Fig.9
ground
ground
ground
V
EE
Signal out for LOS and LOCK indications in
a positive supply voltage application.
MGL671
on chip
OQ2541BHP; OQ2541BU
LEVEL ON PIN
DOUT622
ground
ground
V
V
GND
LOS,
LOCK
EE
EE
off chip
BC857
10 k
Product specification
signal out
5 V
DOUT1250
ground
V
V
V
EE
EE
EE

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