lrs1386 Sharp Microelectronics of the Americas, lrs1386 Datasheet - Page 78
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lrs1386
Manufacturer Part Number
lrs1386
Description
Flash Memory
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
1.LRS1386.pdf
(114 pages)
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FUM00701
32
For additional page buffer program, write another Page
Buffer Program setup command (E8H) and check XSR.7.
The Page Buffer Program command can be queued while
WSM is busy as long as XSR.7 indicates "1", because
LH28F320BX/LH28F640BX series has two buffers. If an
error occurs while programming, the device will stop
programming and flush next page buffer program
command which has been previously queued. Status
register bit SR.4 is set to "1". SR.4 should be cleared
before writing next command.
If the Page Buffer Program command is attempted past an
erase block boundary, the device will program the data to
the flash array up to an erase block boundary and then
stop programming. The status register bits SR.5 and SR.4
will be set to "1" (command sequence error). SR.5 and
SR.4 should be cleared before writing next command.
For reliable page buffer program operation, apply the
specified voltage on V
and V
on V
. In the
CC
PPH1/2
PP
absence of this voltage, page buffer program operations
are not guaranteed. For example, attempting a page buffer
program at V
V
causes SR.4 and SR.3 being set to
PP
PPLK
"1". Also, successful page buffer program requires for the
selected block is unlocked. When page buffer program is
attempted to the locked block, bits SR.4 and SR.1 will be
set to "1".
During page buffer program, dual work operation is
available. The array data can be read from partitions not
being programmed.
Page buffer program operation may occur in only one
partition at a time. Other partitions must be in one of the
read modes.
Rev. 2.20
Appendix to Spec No.: MFM2-J13302
Model No.: LRS1386
March 2, 2001
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