lrs1386 Sharp Microelectronics of the Americas, lrs1386 Datasheet - Page 90
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lrs1386
Manufacturer Part Number
lrs1386
Description
Flash Memory
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
1.LRS1386.pdf
(114 pages)
4.13 Clear Block Lock Bit Command
A locked block can be unlocked by writing the Clear
Block Lock Bit command. The features of clear block
lock bit is as follows:
The Clear Block Lock Bit command is a two-cycle
command. At the first cycle, command (60H) and an
address within the block to be unlocked is written to the
target partition. At the second cycle, command (D0H) and
the same address as the first cycle is written. Read
operations to the target partition output the status register
data until another valid command is written. After writing
the second cycle command, the block lock bit is cleared
within the minimum command cycle time and the
corresponding block is unlocked. To check the unlock
status, write the Read Identifier Codes/OTP command
(90H) and an address within the target block. Subsequent
reads at Block Base Address +2 (see Table 6 through
Table 8) will output the lock/unlock status of that block.
The lock/unlock status is represented by the output pin
DQ
cleared correctly. Figure 12 shows clear block lock bit
flowchart.
The two-cycle command sequence ensures that block is
not accidentally unlocked. An invalid Clear Block Lock
Bit command sequence will result in both status register
bits SR.5 and SR.4 being set to "1" and the operation will
not be executed.
The Clear Block Lock Bit command is available when the
power supply voltage is specified level, independent of
the voltage on V
• Any block can be independently unlocked by clearing
• The time required to be unlocked is less than the
• Block erase, full chip erase or (page buffer) program
its block lock bit.
minimum command cycle time (minimum time from
the rising edge of CE# or WE# to write the command
to the next rising edge of CE# or WE#).
on an unlocked block can be executed (see Table 11
and Table 12).
0
. If the output of DQ
PP
.
0
is "0", the block lock bit is
Appendix to Spec No.: MFM2-J13302
FUM00701
Model No.: LRS1386
4.14 Set Block Lock-Down Bit Command
The block lock-down bit, when set, increases the security
for data protection. The block lock-down bit has the
following functions.
The Set Block Lock-down Bit command is a two-cycle
command. At the first cycle, command (60H) and an
address within the block to be locked-down is written to
the target partition. At the second cycle, command (2FH)
and the same address as the first cycle is written. Read
operations to the target partition output the status register
data until another valid command is written. After writing
the second cycle command, the block lock-down bit is set
within the minimum command cycle time and the
corresponding block is locked-down. To check the lock-
down status, write the Read Identifier Codes/OTP
command (90H) and an address within the target block.
Subsequent reads at Block Base Address +2 (see Table 6
through Table 8) will output the lock/unlock status of that
block. The lock-down status is represented by the output
pin DQ
bit is set correctly. Figure 11 shows set block lock-down
bit flowchart.
• Any block can be independently locked-down by
• The time required to be locked-down is less than the
• Locked-down block is automatically locked
• When WP# is V
• When WP# is V
• At power-up or device reset, all blocks are not locked-
• Lock-down bit cannot be cleared by software, only by
setting its block lock-down bit.
minimum command cycle time (minimum time from
the rising edge of CE# or WE# to write the command
to the next rising edge of CE# or WE#).
regardless of WP# at V
from lock status changes.
and locked-down blocks can be individually unlocked
by software command. These blocks can then be
re-locked and unlocked as desired while WP# remains
V
previously marked lock-down return to the lock-down
state regardless of any changes made while WP# was
V
down regardless of the states before power-off or reset
operation.
(Lock-down bit is volatile.)
power-off or device reset.
IH
IH
1
. When WP# goes V
(see Table 13).
. If the output of DQ
March 2, 2001
IL
IH
, locked-down blocks are protected
, the lock-down bits are disabled
IL
IL
1
or V
, blocks that were
is "1", the block lock-down
IH
.
Rev. 2.20
44