lrs1805a Sharp Microelectronics of the Americas, lrs1805a Datasheet - Page 41

• Manufacturer Part Number: lrs1805a
• Description: Stacked Chip Flash Memory Smartcombo
• Manufacturer: Sharp Microelectronics of the Americas

sharp
16. Design Considerations
17. Related Document Information
Note:
1. International customers should contact their local SHARP or distribution sales offices.
1. Power Supply Decoupling
2. F-V
3. The Inhibition of Overwrite Operation
4. Power Supply
To avoid a bad effect to the system by flash memory and Smartcombo RAM power switching characteristics, each
device should have a 0.1µF ceramic capacitor connected between F-V
between S-V
Low inductance capacitors should be placed as close as possible to package leads.
Updating the memory contents of flash memories that reside in the target system requires that the printed circuit board
designer pay attention to the F-V
V
Please do not execute reprograming “0” for the bit which has already been programed “0”. Overwrite operation may
generate unerasable bit.
In case of reprograming “0” to the data which has been programed “1”.
For example, changing data from “1011110110111101” to “1010110110111100”
requires “1110111111111110” programing.
Block erase, full chip erase, word write with an invalid F-V
spurious results and should not be attempted.
Device operations at invalid F-V
and should not be attempted.
CC
PP
• Program “0” for the bit in which you want to change data from “1” to “0”.
• Program “1” for the bit which has already been programed “0”.
power bus.
Trace on Printed Circuit Boards
Document No.
FUM00701
CC
and GND.
(1)
PP
CC
Power Supply trace. Use similar trace widths and layout considerations given to the F-
LH28F320BF, LH28F640BF Series Appendix
voltage (See Chapter 11. DC Electrical Characteristics) produce spurious results
L R S 1 8 0 5 A
PP
(See Chapter 11. DC Electrical Characteristics) produce
Document Name
CC
and GND, between F-V
PP
and GND and
39