lrs1805a Sharp Microelectronics of the Americas, lrs1805a Datasheet - Page 8

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lrs1805a

Manufacturer Part Number
lrs1805a
Description
Stacked Chip Flash Memory Smartcombo
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
sharp
3.2 Simultaneous Operation Modes Allowed with Four Planes
Notes:
PARTITION IS:
Full Chip Erase
Word Program
1. “X” denotes the operation available.
2. Configurative Partition Dual Work Restrictions:
Read Query
Block Erase
Block Erase
Read Status
Page Buffer
Read Array
Program
Suspend
Suspend
Read ID
IF ONE
Program
Status register reflects partition state, not WSM (Write State Machine) state - this allows a status register for each partition.
Only one partition can be erased or programmed at a time - no command queuing.
Commands must be written to an address within the block targeted by that command.
Array
Read
X
X
X
X
X
X
X
X
X
Read ID
X
X
X
X
X
X
X
X
X
THEN THE MODES ALLOWED IN THE OTHER PARTITION IS:
Status
Read
X
X
X
X
X
X
X
X
X
X
Query
Read
L R S 1 8 0 5 A
X
X
X
X
X
X
X
X
X
(1, 2)
Program
Word
X
X
X
X
X
Program
Buffer
Page
X
X
X
X
X
Block
Erase
X
X
X
X
Full Chip
Erase
X
Program
Suspend
X
X
X
X
X
Suspend
Block
Erase
X
X
X
X
X
X
X
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