lrs1830 Sharp Microelectronics of the Americas, lrs1830 Datasheet - Page 12
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lrs1830
Manufacturer Part Number
lrs1830
Description
Stacked Chip 256m X16 Boot Block Flash And 32m X16 Scram
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
1.LRS1830.pdf
(82 pages)
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6.1.2 Simultaneous Operation Modes Allowed with Four Planes
Notes:
PARTITION IS:
Word Program
1. “X” denotes the operation available.
2. Configurative Partition Dual Work Restrictions:
3. This table shows operation which can be performed by only the selected chip, not during 2 chips of F
4. It is inhibited to execute the dual work operation between the memory area selected by BS=“0” and the memory area
Block Erase
Block Erase
Read Query
Page Buffer
Read Array
Read Status
Bank Erase
Read ID
Program
Suspend
Suspend
IF ONE
Program
Status register reflects partition state, not WSM (Write State Machine) state - this allows a status register for each partition.
Only one partition can be erased or programmed at a time - no command queuing.
Commands must be written to an address within the block targeted by that command.
selected by BS=“1”
sharp
Array
Read
X
X
X
X
X
X
X
X
X
Read ID
X
X
X
X
X
X
X
X
X
THEN THE MODES ALLOWED IN THE OTHER PARTITION IS:
Status
Read
X
X
X
X
X
X
X
X
X
X
Query
Read
X
X
X
X
X
X
X
X
X
L R S1 8 3 0
Program
Word
(1, 2, 3, 4)
X
X
X
X
X
Program
Buffer
Page
X
X
X
X
X
Block
Erase
X
X
X
X
Erase
Bank
X
Program
Suspend
1
and F
X
X
X
X
X
2
.
Suspend
Block
Erase
X
X
X
X
X
X
X
9
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