lrs1830 Sharp Microelectronics of the Americas, lrs1830 Datasheet - Page 45

• Manufacturer Part Number: lrs1830
• Description: Stacked Chip 256m X16 Boot Block Flash And 32m X16 Scram
• Manufacturer: Sharp Microelectronics of the Americas

7.6 Mode Register Settings
7.6.1 Mode Register Setting Method
Command Sequence
4th Bus Cycle (Write cycle)
Mode Register Setting
Command Sequence
undefined, be sure to set the mode register after initialization at power application. However, since sleep mode is not
entered unless SC-CE
using page read without using sleep mode, it is not necessary to set the mode register.
the highest address (1FFFFFH). The mode register setting is a continuous four-cycle operation (two read cycles and two
write cycles).
for executing commands, and it does not have an exclusive memory area.
Chart (P.56).
sharp
Sleep Mode
The sleep mode can be set using the mode register. Since the initial value of the mode register at power application is
The mode register setting mode can be entered by successively writing two specific data after two continuous reads of
Commands are written to the command register. The command register is used to latch the addresses and data required
For the timing chart and flow chart, refer to Mode Register Setting Timing Chart (P.55), Mode Register Setting Flow
Following table shows the commands and command sequences.
DQ
2
Page Length
= Low when sleep mode is not used, it is not necessary to set the mode register. Moreover, when
1FFFFFH
15
0
Address
1st Bus Cycle
(Read Cycle)
14
0
13
0
Data
-
12
0
11
0
1FFFFFH
Address
L R S1 8 3 0
2nd Bus Cycle
(Read Cycle)
10
0
1
9
0
Data
-
8
0
7
0
1FFFFFH
Address
3rd Bus Cycle
8 words
(Write Cycle)
6
0
5
0
Data
00H
4
0
3
0
1FFFFFH
Address
4th Bus Cycle
(Write Cycle)
PL
2
1
1
Data
07H
0
1
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