lrs1830 Sharp Microelectronics of the Americas, lrs1830 Datasheet - Page 63

• Manufacturer Part Number: lrs1830
• Description: Stacked Chip 256m X16 Boot Block Flash And 32m X16 Scram
• Manufacturer: Sharp Microelectronics of the Americas

9. Design Considerations
1. Power Supply Decoupling
2. WP/A
3. The Inhibition of Overwrite Operation
4. Power Supply
sharp
To avoid a bad effect to the system by flash memory, Smartcombo RAM power switching characteristics, each device
should have a 0.1µF ceramic capacitor connected between V
Low inductance capacitors should be placed as close as possible to package leads.
Updating the memory contents of flash memories that reside in the target system requires that the printed circuit board
designer pay attention to the WP/A
the V
Please do not execute reprograming “0” for the bit which has already been programed “0”. Overwrite operation may
generate unerasable bit.
In case of reprograming “0” to the data which has been programed “1”.
•Program “0” for the bit in which you want to change data from “1” to “0”.
•Program “1” for the bit which has already been programed “0”.
For example, changing data from “1011110110111101” to “1010110110111100”
requires “1110111111111110” programing.
Block erase, bank erase, (page buffer) program with an invalid WP/A
for Flash Memory) produce spurious results and should not be attempted.
Device operations at invalid V
Electrical Characteristics for Smartcombo RAM) produce spurious results and should not be attempted.
CC
CC
power bus.
Trace on Printed Circuit Boards
CC
CC
voltage (See Chapter 6.5 DC Electrical Characteristics for Flash Memory, 7.2 DC
Power Supply trace. Use similar trace widths and layout considerations given to
L R S1 8 3 0
CC
and GND, between WP/A
CC
(See Chapter 6.5 DC Electrical Characteristics
CC
and GND.
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