lrs1830 Sharp Microelectronics of the Americas, lrs1830 Datasheet - Page 61

• Manufacturer Part Number: lrs1830
• Description: Stacked Chip 256m X16 Boot Block Flash And 32m X16 Scram
• Manufacturer: Sharp Microelectronics of the Americas

7. Notes
This product is a stacked CSP package that a 1 2 8 M (x 1 6 ) bit Flash Memory, a 128M (x16) bit Flash Memory and 32M (x16) bit
Smartcombo RAM are assembled into.
-Supply Power
-Power Supply and Chip Enable of Flash Memory, Smartcombo RAM
-Power Up Sequence
-Device Decoupling
sharp
Maximum difference (between F
Two or more chips among Flash memory (F
If the two memories are active together, possibly they may not operate normally by interference noises or data
collision on DQ bus.
Both F
except Smartcombo RAM sleep mode.
When turning on Flash memory power supply, keep F-RST low. After F
for more than 100 nsec.
This is a 3 chips stacked CSP package. When one of the chips is active, others are in standby mode. Therefor, these
power supplies should be designed very carefully.
Exclusive power supply pins for each Memory and GND pin need careful decoupling of devices. Especially, note Flash
Memory and Smartcombo RAM peak current caused by transition of control signals.
When one of the Flash Memory is in busy mode, (page buffer) program, block erase and Bank erase command should
not be inputted to the other (F
1
-V
CC
, F
2
-V
CC
and SC-V
1
-CE, F
1
CC
-V
CC
are needed to be applied by the recommended supply voltage at the same time
2
-CE, SC-CE
, F
2
-V
1
, F
CC
L R S1 8 3 0
2
), Smartcombo RAM should not be active simultaneously.
and SC-V
1
, SC-CE
CC
2
).
) of the voltage is less than 0.3V.
1
,F
2
-V
CC
reaches over 2.7V, keep F-RST low
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