lrs1830 Sharp Microelectronics of the Americas, lrs1830 Datasheet - Page 35

• Manufacturer Part Number: lrs1830
• Description: Stacked Chip 256m X16 Boot Block Flash And 32m X16 Scram
• Manufacturer: Sharp Microelectronics of the Americas

6.6.6 Reset Operations
Notes:
AC Waveform for Reset Operation
DQ
DQ
DQ
F-RST
F-RST
F-RST
Symbol
1. A reset time, t
2.
3. Sampled, not 100% tested.
4. If F-RST asserted while a block erase, bank erase or (page buffer) program operation is not executing, the reset will
5. When the device power-up, holding F-RST low minimum 100ns is required after V
t
t
t
VHQV
t
PLRH
PLPH
VPH
15-0
15-0
15-0
V
are valid. See the AC Characteristics - read cycle for t
complete within 100ns.
also has been in stable there.
sharp
t
CC
PLPH
(D/Q)
(D/Q)
(D/Q)
(P)
(P)
(P)
F-RST Low to Reset during Read
(F-RST should be low during power-up.)
F-RST Low to Reset during Erase or Program
V
V
is <100ns the device may still reset but this is not guaranteed.
GND
2.7V
V
V
V
V
V
V
V
V
V
V
V
V
CC
CC
OH
OH
OH
IH
OL
IH
OL
IH
OL
IL
IL
IL
= 2.7V to F-RST High
= 2.7V to Output Delay
PHQV
, is required from the later of SR.7 (F-RY/BY) going “1” (High-Z) or F-RST going high until outputs
High-Z
High-Z
High-Z
Parameter
( ) Reset during Read rray Mode
(B) Reset during Erase or Program Mode
(C) F-RST rising timing
t
t
PLPH
PLPH
L R S1 8 3 0
PHQV
t
PLRH
.
COMPLETE
t
VPH
BORT
SR.7=
(T
“1”
1, 2, 3
1, 3, 4
1, 3, 5
Notes
A
t
PHQV
t
3
VHQV
= -30°C to +85°C, V
CC
has been in predefined range and
t
PHQV
Min.
100
100
t
PHQV
Max.
CC
22
1
OUTPUT
= 2.7V to 3.1V)
V LID
OUTPUT
V LID
OUTPUT
V LID
Unit
ms
ns
ns
s
32