mt18hts25672chy-667 Micron Semiconductor Products, mt18hts25672chy-667 Datasheet - Page 14

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mt18hts25672chy-667

Manufacturer Part Number
mt18hts25672chy-667
Description
2gb, 4gb X72, Dr 200-pin Ddr2 Sdram Socdimm
Manufacturer
Micron Semiconductor Products
Datasheet
Table 19:
Configuration Register
Table 20:
Table 21:
PDF: 09005aef8253e3ea/Source: 09005aef8253e404
HTS18C256_512x72CH.fm - Rev. B 6/07 EN
Critical lock
15:5
Bit
Bit
4:3
1
2
0
1
2
3
4
5
6
Bit 15
Bit 7
RFU
bit
Description
Accuracy
0: ±2°C over the active range and ±3°C over the monitor range
1: ±1°C over the active range and ±2°C over the monitor range
Wider range
0: Temperatures lower than 0°C are clamped to a binary value of 0
1: Temperatures below 0°C can be read
Temperature resolution
00: 0.5°C LSB
01: 0.25°C LSB
10: 0.125°C LSB
11: 0.0625°C LSB
0: Must be set to zero
Description
Event mode
0: Comparator mode
1: Interrupt mode
EVENT# polarity
0: Active LOW
1: Active HIGH
Critical event only
0: EVENT# trips on alarm or critical temperature event
1: EVENT# trips only if critical temperature is reached
Event output control
0: Event output disabled
1: Event output enabled
Event status
0: EVENT# has not been asserted by this device
1: EVENT# is being asserted due to an alarm window or
critical temperature condition
Clear event
0: No effect
1: Clears the event when the temperature sensor is in
the interrupt mode
Alarm window lock bit
0: Alarm trips are not locked and can be changed
1: Alarm trips are locked and cannot be changed
Capability Register Bits 0–15 Descriptions (continued)
Configuration Register Bits 0–15
Configuration Register Bits 0–10 Descriptions
Alarm lock bit
Bit 14
Bit 6
RFU
Clear event
Bit 13
Bit 5
RFU
Event output
Bit 12
2GB, 4GB (x72, DR) 200-Pin DDR2 SDRAM SOCDIMM
status
Bit 4
RFU
14
Event output
control
Bit 11
Bit 3
RFU
Note
Cannot be changed if either of the lock bits is set
Cannot be changed if either of the lock bits is set
This is a read-only field in the register; the event
causing the event can be determined from the read
temperature register
This is a write-only field in the register and is self
clearing
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Critical event
Bit 10
Bit 2
only
Hysteresis
Event polarity
Temperature Sensor
©2006 Micron Technology, Inc. All rights reserved.
Bit 9
Bit 1
Event mode
Shutdown
mode
Bit 8
Bit 0

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