mt18hts25672chy-667 Micron Semiconductor Products, mt18hts25672chy-667 Datasheet - Page 16

• Manufacturer Part Number: mt18hts25672chy-667
• Description: 2gb, 4gb X72, Dr 200-pin Ddr2 Sdram Socdimm
• Manufacturer: Micron Semiconductor Products

Temperature Format
Upper Boundary Temperature Register
Table 23:
Lower Boundary Temperature Register
Table 24:
Critical Temperature Register
Table 25:
PDF: 09005aef8253e3ea/Source: 09005aef8253e404
HTS18C256_512x72CH.fm - Rev. B 6/07 EN
15
15
15
0
0
0
14
14
14
0
0
0
Upper Boundary Temperature Register Bits
Lower Boundary Temperature Register Bits
Critical Temperature Register Bits
13
13
13
0
0
0
MSB
MSB
MSB
12
12
12
The temperature trip point registers and temperature readout register use a
“2’s complement” format to enable negative numbers. The least significant bit (LSB) is
equal to 0.0625°C or 0.25°C depending on which register is referenced. As an example,
assuming an LSB of 0.0625°C:
• A value of 0x018C would equal 24.75°C
• A value of 0x06C0 would equal 108°C
• A value of 0x1E74 would equal –24.75°C
The upper boundary temperature register is used to set the maximum value of the alarm
window. The LSB for this register is 0.25°C. All RFU bits in the register will always report
zero.
The lower boundary temperature register is used to set the minimum value of the alarm
window. The LSB for this register is 0.25
zero.
The critical temperature register is used to set the maximum temperature above the
alarm window. The LSB for this register is 0.25°C. All RFU bits in the register will always
report zero.
11
11
11
10
10
10
Alarm window upper boundary temperature
Alarm window lower boundary temperature
9
9
9
Critical temperature trip point
2GB, 4GB (x72, DR) 200-Pin DDR2 SDRAM SOCDIMM
8
8
8
16
7
7
7
Micron Technology, Inc., reserves the right to change products or specifications without notice.
o
C. All RFU bits in the register will always report
6
6
6
5
5
5
4
4
4
Temperature Sensor
©2006 Micron Technology, Inc. All rights reserved.
3
3
3
LSB
LSB
LSB
2
2
2
RFU
RFU
RFU
1
1
1
RFU
RFU
RFU
0
0
0