m391t5663qz3 Samsung Semiconductor, Inc., m391t5663qz3 Datasheet
m391t5663qz3
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m391t5663qz3 Summary of contents
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... UDIMM DDR2 Unbuffered SDRAM MODULE 240pin Unbuffered Module based on 1Gb Q-die 60FBGA & 84FBGA with Lead-Free and Halogen-Free INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY ...
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... Refresh Parameters by Device Density 14.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin 14.3 Timing Parameters by Speed Grade 15.0 Physical Dimensions : ..............................................................................................................22 15.1 128Mbx8 based 128Mx64 Module (1 Rank) 15.2 128Mbx8 based 128M x72 Module (1 Rank) 15.3 128Mbx8 based 256Mx64/x72 Module (2 Ranks) 15.4 64Mbx16 based 64Mx64 Module (1 Rank) ......................................................................................8 ................................................................................9 ...
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UDIMM Revision History Revision Month Year 1.0 September 2007 1.1 April 2008 1.2 July 2008 - Initial Release - Correted Typo - Applied JEDEC update(JESD79-2E timing table DDR2 SDRAM History Rev. 1.2 July 2008 ...
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... Support High Temperature Self-Refresh rate enable feature • Package: 60ball FBGA - 128Mx8 and 84ball FBGA - 64Mx16 • All of base components are Lead-Free, Halogen-Free, and RoHS compliant 3.0 Address Configuration Organization 128Mx8(1Gb) based Module 64Mx16(1Gb) based Module Density Organization Component Composition x64 Non ECC 1GB ...
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... DQ22 DQ18 150 DQ23 Connect, RFU = Reserved for Future Use 1. Pin196(A13) is used for x4/x8 base Unbuffered DIMM. 2. The TEST pin is reserved for bus analysis tools and is not connected on standard memory module products (DIMMs.) Front Pin Back Pin Front V DQ19 151 61 ...
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... DQ23 Connect, RFU = Reserved for Future Use 1. Pin196(A13) is used for x4/x8 base Unbuffered DIMM. 2. The TEST pin is reserved for bus analysis tools and is not connected on standard memory module products (DIMMs.) 6.0 Pin Description Pin Name Description A0-A13 DDR2 SDRAM address bus ...
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... DM loading matches the DQ and DQS loading. Power and ground for DDR2 SDRAM input buffers, and core logic planes on these modules. DDQ Data strobe for input and output data. For Rawcards using x16 orginized DRAMs DQ0-7 connect to the LDQS pin of the DRAMs and DQ8-17 connect to the UDQS pin of the DRAM These signals and tied at the system planar to either V address range ...
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... UDIMM 8.0 Functional Block Diagram : 8.1 1GB, 128Mx64 Module - M378T2863QZ(H)S (Populated as 1 rank of x8 DDR2 SDRAMs) S0 DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 I/O 0 DQ9 I DQ10 I/O 2 DQ11 I/O 3 DQ12 ...
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... UDIMM 8.2 1GB, 128Mx72 ECC Module - M391T2863QZ(H)3 S0 DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 I/O 0 DQ9 I DQ10 I/O 2 DQ11 I/O 3 DQ12 I/O 4 DQ13 I/O 5 DQ14 I/O 6 DQ15 I/O 7 DQS2 DQS2 DM2 DM CS DQS DQS ...
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... UDIMM 8.3 2GB, 256Mx64 Module - M378T5663QZ(H)3 (Populated as 2 ranks of x8 DDR2 SDRAMs DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 I/O 0 DQ9 I DQ10 I/O 2 DQ11 I/O 3 DQ12 I/O 4 DQ13 I/O 5 DQ14 ...
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... UDIMM 8.4 2GB, 256Mx72 ECC Module - M391T5663QZ(H DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 I/O 0 DQ9 I DQ10 I/O 2 DQ11 I/O 3 DQ12 I/O 4 DQ13 I/O 5 DQ14 I/O 6 DQ15 I/O 7 DQS2 DQS2 DM2 DM CS DQS DQS ...
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... UDIMM 8.5 512MB, 64Mx64 Module - M378T6464QZ(H)3 (Populated as 1 rank of x16 DDR2 SDRAMs) DQS1 DQS1 DM1 DQS0 DQS0 DM0 DQS3 DQS3 DM3 DQS2 DQS2 DM2 Serial PD SCL SA0 SA1 SA2 BA0 - BA1 BA0-BA1 : DDR2 SDRAMs A12 A0-A12 : DDR2 SDRAMs ...
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UDIMM 9.0 Absolute Maximum DC Ratings Symbol Parameter V Voltage on V pin relative Voltage on V pin relative to V DDQ DDQ V Voltage on V pin relative to V DDL DDL V V ...
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UDIMM 10.2 Operating Temperature Condition Symbol T Operating Temperature OPER Note : 1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JESD51.2 standard ...
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UDIMM 11.0 IDD Specification Parameters Definition (IDD values are for full operating range of Voltage and Temperature) Symbol Operating one bank active-precharge current; IDD0 tCK = tCK(IDD), tRC = tRC(IDD), tRAS = tRASmin(IDD); CKE is HIGH HIGH between ...
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... IDD3N 720 IDD4W 1,200 IDD4R 1,360 IDD5 1,440 IDD6 240 IDD7 2,280 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. 800@CL6 667@CL=5 CF7 CE6 600 560 680 640 120 120 240 240 ...
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... IDD3N 810 IDD4W 1,350 IDD4R 1,530 IDD5 1,620 IDD6 270 IDD7 2,565 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. 800@CL=6 667@CL=5 CF7 CE6 675 630 765 720 135 135 270 270 ...
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... IDD3P-S 72 IDD3N 220 IDD4W 520 IDD4R 700 IDD5 580 IDD6 60 IDD7 1,060 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. 800@CL=6 667@CL=5 CF7 CE6 360 340 400 380 60 60 120 120 140 140 ...
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UDIMM 13.0 Input/Output Capacitance Parameter Non-ECC Input capacitance, CK and CK Input capacitance, CKE and CS Input capacitance, Addr, RAS, CAS, WE Input/output capacitance, DQ, DM, DQS, DQS ECC Input capacitance, CK and CK Input capacitance, CKE and CS Input ...
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UDIMM 14.3 Timing Parameters by Speed Grade (Refer to notes for informations related to this table at the component datasheet) Parameter DQ output access time from CK/CK DQS output access time from CK/CK Average clock HIGH pulse width Average clock ...
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UDIMM Parameter Four Activate Window for 1KB page size products Four Activate Window for 2KB page size products CAS to CAS command delay Write recovery time Auto precharge write recovery + precharge time Internal write to read command delay Internal ...
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... UDIMM 15.0 Physical Dimensions : 15.1 128Mbx8 based 128Mx64 Module(1 Rank) (2) 2.50 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 128M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T1G084QQ - M378T2863QZ(H)S 133.35 131.35 128. 63.00 4.00 0.80±0.05 3.80 1.00 Detail DDR2 SDRAM Units : Millimeters SPD 30.00 2.7 55.00 1.270 ± 0.10 3.00 0.20 4.00 Rev. 1.2 July 2008 ...
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... UDIMM 15.2 128Mbx8 based 128Mx72 Module(1 Rank) (2) 2.50 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 128M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T1G084QQ - M391T2863QZ(H)3 133.35 131.35 128.95 ECC SPD (for x72 63.00 4.00 0.80±0.05 3.80 1.00 Detail DDR2 SDRAM Units : Millimeters 30.00 2.7 55.00 1.270 ± 0.10 3.00 0.20 4.00 Rev. 1.2 July 2008 ...
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... UDIMM 15.3 128Mbx8 based 256Mx64/x72 Module(2 Ranks) - M378T5663QZ(H)3/M391T5663QZ(H)3 (2) 2.50 63.00 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 128M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T1G084QQ 133.35 131.35 128.95 N/A (for x64) ECC SPD (for x72 55.00 N/A (for x64) ECC (for x72) 4.00 0.80±0.05 3.80 1.00 Detail DDR2 SDRAM Units : Millimeters 4 ...
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... UDIMM 15.4 64Mbx16 based 64Mx64 Module (1 Rank) (2) 2.50 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 64M x16 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T1G164QQ - M378T6464QZ(H)3 133.35 131.35 128. 63.00 4.00 0.80±0.05 3.80 1.00 Detail DDR2 SDRAM Units : Millimeters SPD 30.00 2.7 55.00 1.270 ± 0.10 3.00 0.20 4.00 Rev. 1.2 July 2008 ...