m391t5663qz3 Samsung Semiconductor, Inc., m391t5663qz3 Datasheet - Page 2

• Manufacturer Part Number: m391t5663qz3
• Description: Ddr2 Unbuffered Sdram Module
• Manufacturer: Samsung Semiconductor, Inc.

UDIMM
Table of Contents
1.0 DDR2 Unbuffered DIMM Ordering Information ..........................................................................4
2.0 Features .........................................................................................................................................4
3.0 Address Configuration .................................................................................................................4
4.0 x64 DIMM Pin Configurations (Front side/Back side) ................................................................5
5.0 x72 DIMM Pin Configurations (Front side/Back side) ................................................................6
6.0 Pin Description ..............................................................................................................................6
7.0 Input/Output Function Description .............................................................................................7
8.0 Functional Block Diagram : .........................................................................................................8
9.0 Absolute Maximum DC Ratings .................................................................................................13
10.0 AC & DC Operating Conditions ...............................................................................................13
11.0 IDD Specification Parameters Definition ................................................................................15
12.0 Operating Current Table : .........................................................................................................16
13.0 Input/Output Capacitance ........................................................................................................19
14.0 Electrical Characteristics & AC Timing for DDR2-800/667 ....................................................19
15.0 Physical Dimensions : ..............................................................................................................22
8.1 1GB, 128Mx64 Module - M378T2863QZ(H)S
8.2 1GB, 128Mx72 ECC Module - M391T2863QZ(H)3
8.3 2GB, 256Mx64 Module - M378T5663QZ(H)3
8.4 2GB, 256Mx72 ECC Module - M391T5663QZ(H)3
8.5 512MB, 64Mx64 Module - M378T6464QZ(H)3
10.1 Recommended DC Operating Conditions (SSTL - 1.8)
10.2 Operating Temperature Condition
10.3 Input DC Logic Level
10.4 Input AC Logic Level
10.5 AC Input Test Conditions
12.1 M378T2863QZ(H)S : 1GB(128Mx8 *8) Module
12.2 M378T5663QZ(H)3 : 2GB(128Mx8 *16) Module
12.3 M391T2863QZ(H)3 : 1GB(128Mx8 *9) ECC Module
12.4 M391T5663QZ(H)3 : 2GB(128Mx8 *18) ECC Module
12.5 M378T6464QZ(H)3 : 512MB(64Mx16 *4) Module
14.1 Refresh Parameters by Device Density
14.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin
14.3 Timing Parameters by Speed Grade
15.1 128Mbx8 based 128Mx64 Module (1 Rank)
15.2 128Mbx8 based 128M x72 Module (1 Rank)
15.3 128Mbx8 based 256Mx64/x72 Module (2 Ranks)
15.4 64Mbx16 based 64Mx64 Module (1 Rank)
..................................................................................................................14
..................................................................................................................14
............................................................................................................14
................................................................................................14
.............................................................................................20
.........................................................................................19
......................................................................................25
.....................................................................................10
......................................................................................8
....................................................................................22
...................................................................................12
...................................................................................23
2 of 25
................................................................................16
................................................................................9
..............................................................................11
..............................................................................16
.............................................................................18
.............................................................................24
..........................................................................17
........................................................................17
....................................................................13
..............................................19
DDR2 SDRAM
Rev. 1.2 July 2008