m391t5663qz3 Samsung Semiconductor, Inc., m391t5663qz3 Datasheet - Page 21

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m391t5663qz3

Manufacturer Part Number
m391t5663qz3
Description
Ddr2 Unbuffered Sdram Module
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
UDIMM
Parameter
Four Activate Window for 1KB page size products
Four Activate Window for 2KB page size products
CAS to CAS command delay
Write recovery time
Auto precharge write recovery + precharge time
Internal write to read command delay
Internal read to precharge command delay
Exit self refresh to a non-read command
Exit self refresh to a read command
Exit precharge power down to any command
Exit active power down to read command
Exit active power down to read command
(slow exit, lower power)
CKE minimum pulse width (HIGH and LOW pulse width)
ODT turn-on delay
ODT turn-on
ODT turn-on (Power-Down mode)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down mode)
ODT to power down entry latency
ODT power down exit latency
OCD drive mode output delay
Minimum time clocks remains ON after CKE asynchronously
drops LOW
Symbol
tFAW
tFAW
tCCD
tWR
tDAL
tWTR
tRTP
tXSNR
tXSRD
tXP
tXARD
tXARDS
tCKE
tAOND
tAON
tAONPD
tAOFD
tAOF
tAOFPD
tANPD
tAXPD
tOIT
tDelay
21 of 25
tIS+tCK(avg)
WR + tnRP
tAC(min)+2
tAC(min)+2
tRFC + 10
tAC(min)
tAC(min)
8 - AL
min
+tIH
200
7.5
7.5
2.5
35
45
15
2
3
2
3
8
0
2
2
DDR2-800
tAC(max)+0.7
tAC(max)+0.6
+tAC(max)+1
+tAC(max)+1
2.5*tCK(avg)
2*tCK(avg)
max
2.5
12
x
x
x
x
x
x
x
x
x
x
x
x
x
2
x
x
x
tIS+tCK(avg)
tAC(min)+2
tAC(min)+2
WR + tnRP
tRFC + 10
tAC(min)
tAC(min)
7 - AL
min
37.5
+tIH
200
7.5
7.5
2.5
50
15
2
0
2
3
3
8
2
2
DDR2-667
tAC(max)+0.7
tAC(max)+0.6
+tAC(max)+1
+tAC(max)+1
2.5*tCK(avg)
2*tCK(avg)
max
2.5
12
2
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
DDR2 SDRAM
Rev. 1.2 July 2008
Units
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
17,43,45
6,16,40
Notes
24,32
17,45
3,32
1,2
32
32
32
33
32
27
16
32
15
1

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