k4r881869m Samsung Semiconductor, Inc., k4r881869m Datasheet - Page 59

• Manufacturer Part Number: k4r881869m
• Description: 288mbit Rdram 512k X 18 Bit X 2*16 Dependent Banks Direct Rdramtm
• Manufacturer: Samsung Semiconductor, Inc.

K4R881869M
This circuit does not include pin coupling effects that are
often present in the packaged device. Because coupling
effects make the effective single-pin inductance L
capacitance C
eters are intrinsically data-dependent. For purposes of speci-
fying the device electrical loading on the Channel, the
effective L
all specified operating conditions.
L
device pin assignment. Because the pad assignment places
a. This value is a combination of the device IO circuitry and package capacitances.
a. This value is a combination of the device IO circuitry and package capacitances.
L
L
C
C
R
L
C
C
I
is defined as the effective pin inductance based on the
I
12
L
C
I ,CMOS
I
12
I
I ,CMOS
I ,CMOS,SIO
I
I
Symbol
Symbol
I
and C
I
, a function of neighboring pins, these param-
I
are defined as the worst-case values over
RSL effective input inductance
Mutual inductance between any DQA or DQB RSL signals.
Mutual inductance between any ROW or COL RSL signals.
Difference in L
RSL effective input capacitance
RSL effective input capacitance
RSL effective input capacitance
Mutual capacitance between any RSL signals.
Difference in C
RSL pins of a single device.
RSL effective input resistance
CMOS effective input inductance
CMOS effective input capacitance (SCK,CMD)
CMOS effective input capacitance (SIO1, SIO0)
Parameter and Conditions - CMOS pins
Parameter and Conditions - RSL pins
I
I
value between any RSL pins of a single device.
value between average of CTM/CFM and any
Table 26: CMOS Pin Parasitics
Table 25: RSL Pin Parasitics
a
a
a
I
, and
Page 57
a
a
each RSL signal adjacent to an AC ground (a Gnd or Vdd
pin), the effective inductance must be defined based on this
configuration. Therefore, L
pin adjacent to an AC ground.
C
device pin assignment. It is the sum of the effective package
pin capacitance and the IO pad capacitance.
I
is defined as the effective pin capacitance based on the
-600
-800
-711
-
2.0
2.0
2.0
-
-
4
1.7
-
Min
Min
I
assumes a loop with the RSL
4.0
0.2
0.6
1.8
2.4
2.4
2.6
0.1
0.06
15
Preliminary
8.0
2.1
7.0
Direct RDRAM
Rev. 0.9 Jan. 2000
Max
Max
nH
nH
nH
nH
pF
pF
pF
pF
pF
nH
pF
pF
Unit
Unit
™