emc646sp16ak Emlsi Inc., emc646sp16ak Datasheet - Page 44
emc646sp16ak
Manufacturer Part Number
emc646sp16ak
Description
4mx16 Bit Cellularram
Manufacturer
Emlsi Inc.
Datasheet
1.EMC646SP16AK.pdf
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Figure 33. Burst READ at End-of-Row (Wrap Off)
Note:
1. Non-default BCR settings for burst READ at end of row : fixed or variable latency, WAIT active LOW; WAIT asserted during delay.
2. For burst READs, CE# must go HIGH before the second CLK after the WAIT period begins ( before the second CLK after WAIT asserts with BCR[8]=0, or before the
third CLK after WAIT asserts with BCR[8]=1 ).
DQ[15:0]
UB#/LB#
A[21:0]
ADV#
WAIT
CLK
CE#
OE#
WE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
OH
OL
OH
OL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
t
CLK
Output
Valid
t
t
KOH
KHTL
Output
Valid
t
HD
End of row
t
HZ
Note 2
44
t
CSP
t
HZ
EMC646SP16AK
Don’t Care
4Mx16 CellularRAM
High-Z
Undefined
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