emc646sp16ak Emlsi Inc., emc646sp16ak Datasheet - Page 51
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emc646sp16ak
Manufacturer Part Number
emc646sp16ak
Description
4mx16 Bit Cellularram
Manufacturer
Emlsi Inc.
Datasheet
1.EMC646SP16AK.pdf
(64 pages)
- Current page: 51 of 64
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Figure 40. Burst WRITE Operation - Fixed Latency Mode
Note:
1. Non-default BCR settings for burst WRITE operation in fixed latency mode: Fixed latency; latency code two (three clocks); WAIT active LOW;
2. WAIT asserts for LC cycles for both fixed and variable latency. LC = Latency Code (BCR[13:11]).
3. t
WAIT asserted during delay; burst length four; burst wrap enabled.
AS
required if t
LB#/UB#
DQ[15:0]
A[21:0]
ADV#
WAIT
WE#
CSP
CLK
OE#
CE#
> 20ns.
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
OH
OL
IH
IL
High-Z
t
t
AS
AS
3
3
WRITE Burst Identified
t
t
t
SP
Valid Address
CSP
t
SP
t
CEW
SP
(WE# = Low)
t
t
HD
HD
t
AVH
Note 2
t
KHTL
51
t
SP
t
CLK
t
t
CEM
SP
D1
t
HD
t
HD
t
KHKL
D2
D3
EMC646SP16AK
t
KP
4Mx16 CellularRAM
t
KP
D0
t
HD
t
HZ
t
CBPH
Don’t Care
High-Z
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