cn8236 Mindspeed Technologies, cn8236 Datasheet - Page 141

• Manufacturer Part Number: cn8236
• Description: Atm Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

CN8236
ATM ServiceSAR Plus with xBR Traffic Management
28236-DSH-001-B
5.5 Global Statistics
To meet the requirements of ILMI (ATM Forum) and AToM (RFC1695)
documents, three register-based counters are implemented:
16-bit counter. All three are set to 0 upon a reset and are not reset to 0 upon a read
of the counter by the host. The counters roll over and optionally cause an interrupt
upon rollover.
• CELL_RCVD_CNT—Number of cells received that map to active
• CELL_DSC_CNT—Number of cells received that map to inactive
• AAL5_DSC_CNT—Number of AAL5 CPCS-PDUs discarded due to per
The first two counters are implemented as 32-bit counters, and the third is a
channels.
channels. This includes idle cells, since those channels is turned off.
channel firewall, buffer queue underflow, FIFO buffer full packet discard,
status queue overflow, or maximum CPCS-PDU length exceeded on
non-EOM cells.
Mindspeed Technologies
™
5.0 Reassembly Coprocessor
5.5 Global Statistics
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