cn8236 Mindspeed Technologies, cn8236 Datasheet - Page 342

• Manufacturer Part Number: cn8236
• Description: Atm Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

14.0 CN8236 Registers
14.6 Counters and Status Registers
14.6 Counters and Status Registers
0x160
This register counts the number of user data cells transmitted by the segmentation coprocessor. The counter is
reset to 0 by an assertion of either the HRST* system reset pin or the GLOBAL_RESET bit in the CONFIG0
register. Optionally, an interrupt can be programmed when the counter rolls over.
0x164
This register counts the number of assigned cells received by the reassembly coprocessor. The counter is reset to
0 by an assertion of either the HRST* system reset pin or the GLOBAL_RESET bit in the CONFIG0 register.
Optionally, an interrupt can be programmed when the counter rolls over.
0x168
This register counts the number of unassigned cells received by the reassembly coprocessor. The counter is reset
to 0 by an assertion of either the HRST* system reset pin or the GLOBAL_RESET bit in the CONFIG0 register.
Optionally, an interrupt can be programmed when the counter rolls over.
14-26
31–0
31–0
31–0
Bit
Bit
Bit
—
—
—
ATM Cells Transmitted Counter (CELL_XMIT_CNT)
ATM Cells Received Counter (CELL_RCVD_CNT)
ATM Cells Discarded Counter (CELL_DSC_CNT)
Field
Field
Size
Size
Field
Size
32
32
32
CELL_XMIT_CNT
CELL_DSC_CNT
CELL_RCVD_CNT
Name
Name
Name
Mindspeed Technologies
Count of unassigned cells dropped.
Count of user data cells transmitted.
Count of assigned received cells.
ATM ServiceSAR Plus with xBR Traffic Management
™
Description
Description
Description
28236-DSH-001-B
CN8236