cn8236 Mindspeed Technologies, cn8236 Datasheet - Page 20
cn8236
Manufacturer Part Number
cn8236
Description
Atm Servicesar Plus With Xbr Traffic Management
Manufacturer
Mindspeed Technologies
Datasheet
1.CN8236.pdf
(443 pages)
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List of Figures
Figure 5-14.
Figure 5-15.
Figure 5-16.
Figure 5-17.
Figure 5-18.
Figure 5-19.
Figure 6-1.
Figure 6-2.
Figure 6-3.
Figure 6-4.
Figure 6-5.
Figure 6-6.
Figure 6-7.
Figure 6-8.
Figure 6-9.
Figure 6-10.
Figure 6-11.
Figure 6-12.
Figure 6-13.
Figure 6-14.
Figure 6-15.
Figure 6-16.
Figure 6-17.
Figure 6-18.
Figure 6-19.
Figure 6-20.
Figure 6-21.
Figure 6-22.
Figure 6-23.
Figure 6-24.
Figure 7-1.
Figure 7-2.
Figure 8-1.
Figure 8-2.
Figure 8-3.
Figure 8-4.
Figure 9-1.
Figure 9-2.
Figure 9-3.
Figure 10-1.
Figure 10-2.
Figure 10-3.
Figure 10-4.
Figure 10-5.
Figure 10-6.
Figure 10-7.
Data Buffer Structures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-21
Data Structure Locations for Status Queues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-32
Status Queue Structure Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-33
VPI/VCI Channel Lookup Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-37
Reassembly VCC Table Entry Lookup Mechanism. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39
LECID Table, Illustrated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-55
Non-ABR Cell Scheduling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4
ABR Flow Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
Schedule Table with Size = 100 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-8
Schedule Slot Formats With USE_SCH_CTRL Not Asserted . . . . . . . . . . . . . . . . . . . . . . . 6-11
Schedule Slot Formats With USE_SCH_CTRL Asserted . . . . . . . . . . . . . . . . . . . . . . . . . . 6-12
One Possible Scheduling Priority Scheme with the CN8236 . . . . . . . . . . . . . . . . . . . . . . . 6-13
Assigning CBR Cell Slots. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-15
Introduction of CDV at the ATM/PHY Layer Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-16
Schedule Table with Slot Conflicts at Different CBR Rates . . . . . . . . . . . . . . . . . . . . . . . . 6-16
CDV Caused by Schedule Table Size at Certain CBR Rates . . . . . . . . . . . . . . . . . . . . . . . . 6-17
Another Possible Scheduling Priority Scheme with the CN8236 . . . . . . . . . . . . . . . . . . . . 6-22
ABR Service Category Feedback Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-24
CN8236 ABR-ER Feedback Loop (Source Behavior) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-25
CN8236 ABR-ER Feedback Generation (Destination Behavior) . . . . . . . . . . . . . . . . . . . . . 6-26
Steady State ABR-ER Cell Stream . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-28
Cell Type Interleaving on ABR-ER Cell Stream. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-29
Cell Decision Table for Nrm = 32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-31
Backward_RM Flow Control, Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-33
RR RATE_INDEX Candidate Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-34
ER RATE_INDEX Candidate Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-35
Dynamic Traffic Shaping from RM Cell Feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-36
ER Reduction Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-39
ABR Linkage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-58
Head and Tail Pointers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-60
OAM Cell Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-5
Functional Blocks for PM Segmentation and Reassembly. . . . . . . . . . . . . . . . . . . . . . . . . 7-11
LIttle Endian Aligned Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2
Little Endian Misaligned Transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-3
Big Endian Aligned Transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-3
Big Endian Misaligned Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-4
CN8236 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2
0.5 MB SRAM Bank Utilizing by_8 Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-4
1 MB SRAM Bank Utilizing by_16 Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-4
CN8236—Local Processor Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1
Local Processor Single Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-6
Local Processor Single Read Cycle with Arbitration Wait States . . . . . . . . . . . . . . . . . . . . 10-7
Local Processor Double Read with Wait States Inserted . . . . . . . . . . . . . . . . . . . . . . . . . . 10-8
Local Processor Single Write with One Wait State by_16 SRAM. . . . . . . . . . . . . . . . . . . . 10-9
Local Processor Quad Write, No Wait States. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-10
i960CA/CF to the CN8236 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-12
Mindspeed Technologies
ATM ServiceSAR Plus with xBR Traffic Management
™
28236-DSH-001-B
CN8236
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