A40MX02-PL208A ACTEL [Actel Corporation], A40MX02-PL208A Datasheet - Page 26

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A40MX02-PL208A

Manufacturer Part Number
A40MX02-PL208A
Description
40MX and 42MX Automotive FPGA Families
Manufacturer
ACTEL [Actel Corporation]
Datasheet
Decode Module Timing
Figure 1-26 • Decode Module Timing
Figure 1-27 • SRAM Timing Characteristics
1 -2 2
40MX and 42MX Automotive FPGA Families
A–G, H
Y
C
D
G
A
B
E
F
WRAD [5:0]
BLKEN
WEN
WCLK
WD [7:0]
Write Port
t PLH
50%
H
3 2x8 or 64x4
RAM Array
(2 56 Bits)
v3.1
t PHL
Read Port
RDAD [5:0]
RD [7:0]
RCLK
LEW
REN
Y

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