A40MX02-PL208A ACTEL [Actel Corporation], A40MX02-PL208A Datasheet - Page 33
![no-image](/images/no-image-200.jpg)
A40MX02-PL208A
Manufacturer Part Number
A40MX02-PL208A
Description
40MX and 42MX Automotive FPGA Families
Manufacturer
ACTEL [Actel Corporation]
Datasheet
1.A40MX02-PL208A.pdf
(78 pages)
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Table 1-9 • A40MX02 Timing Characteristics (Nominal 5.0V Operation)
Worst-Case Automotive Conditions, V
Parameter
Global Clock Networks
t
t
t
t
t
t
f
TTL Output Module Timing
t
t
t
t
t
t
d
d
Notes:
1. Routing delays are for typical designs across worst-case operating conditions. These parameters should be used for estimating device
2. Setup times assume a fanout of 3. Further testing information can be obtained from the Timer tool.
3. The hold time for the DFME1A macro may be greater than 0 ns. Use the Timer tool in Designer to check the hold time for this
4. Delays based on 35 pF loading.
CKH
CKL
PWH
PWL
CKSW
P
MAX
DLH
DHL
ENZH
ENZL
ENHZ
ENLZ
TLH
THL
performance. Post-route timing analysis or simulation is required to determine actual performance.
macro.
Input Low to HIGH
Input High to LOW
Minimum Pulse Width HIGH
Minimum Pulse Width LOW
Maximum Skew
Minimum Period
Maximum Frequency
Data-to-Pad HIGH
Data-to-Pad LOW
Enable Pad Z to HIGH
Enable Pad Z to LOW
Enable Pad HIGH to Z
Enable Pad LOW to Z
Delta LOW to HIGH
Delta HIGH to LOW
4
CC
= 4.75V, T
Description
J
= 125°C (Continued)
v3.1
FO = 16
FO = 128
FO = 16
FO = 128
FO = 16
FO = 128
FO = 16
FO = 128
FO = 16
FO = 128
FO = 16
FO = 128
FO = 16
FO = 128
40MX and 42MX Automotive FPGA Families
Min.
3.9
4.2
3.9
4.2
8.3
8.7
Std. Speed
Max.
14.1
10.4
0.03
0.05
120
116
8.1
8.1
8.6
8.6
0.7
0.9
5.9
7.1
6.7
8.3
Units
ns/pF
ns/pF
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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