bt829bkrf ETC-unknow, bt829bkrf Datasheet - Page 72

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bt829bkrf

Manufacturer Part Number
bt829bkrf
Description
Video Streamii Decoders
Manufacturer
ETC-unknow
Datasheet

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62
2.0 Electrical Interfaces
2.3 I
2.3.1 Starting and Stopping
2
C Interface
2.3 I
The Inter-Integrated Circuit bus is a two-wire serial interface. Serial Clock (SCL)
and Data Lines (SDA) are used to transfer data between the bus master and the
slave device. The Bt829B can transfer data at a maximum rate of 100 kbps. The
Bt829B operates as a slave device.
The relationship between SCL and SDA is decoded to provide both a start and
stop condition on the bus. To initiate a transfer on the I
transmit a start pulse to the slave device. This is accomplished by taking the SDA
line low while the SCL line is held high. The master should only generate a start
pulse at the beginning of the cycle, or after the transfer of a data byte to or from
the slave. To terminate a transfer, the master must take the SDA line high while
the SCL line is held high. The master may issue a stop pulse at any time during an
I
the high phase of the SCL line as a start or stop pulse, care must be taken to
ensure that data is stable during the high phase of the clock. Figure 2-13 illus-
trates the relationship between SCL and SDA.
Figure 2-13. The Relationship between SCL and SDA
2
C cycle. Since the I
2
C Interface
SDA
SCL
D829BDSA
2
C bus will interpret any transition on the SDA line during
Start
Stop
2
VideoStream II Decoders
C bus, the master must
Bt829B/827B

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