bt829bkrf ETC-unknow, bt829bkrf Datasheet - Page 97

• Manufacturer Part Number: bt829bkrf
• Description: Video Streamii Decoders
• Manufacturer: ETC-unknow

Bt829B
VideoStream II Decoders
0x0B—Miscellaneous Control Register (CONTROL)
The MPU can read or write to this control register at any time. Upon reset, it is initialized to 0x20.
SAT_V_MSB is the LSB. An asterisk indicates the default option.
LNOTCH
COMP
LDEC
CBSENSE
Reserved
CON_MSB
SAT_U_MSB
SAT_V_MSB
LNOTCH
7
0
This bit is used to include the luma notch filter. For monochrome video, the notch should not
be used. This will output full bandwidth luminance.
When COMP is set to logical 1, the luma notch is disabled. When COMP is set to logical 0, the
C ADC is disabled.
The luma decimation filter is used to reduce the high-frequency component of the luma signal.
This is useful when scaling to CIF resolutions or lower.
This bit controls whether the first pixel of a line is a Cb pixel or a Cr pixel. For example, if
CBSENSE is low and HDELAY is an even number, the first active pixel output is a Cb pixel. If
HDELAY is odd, CBSENSE may be programmed high to produce a Cb pixel as the first active
pixel output.
This bit should only be written with a logical 0.
The most significant bit of the luma gain (contrast) value.
The most significant bit of the chroma (u) gain value.
The most significant bit of the chroma (v) gain value.
COMP
6
0
LDEC
5
1
0*
1
0*
1
0
1*
0*
1
=
=
=
=
=
=
=
=
CBSENSE
Enable the luma notch filter
Disable the luma notch filter
Composite Video
Y/C Component Video
Enable luma decimation using selectable H filter
Disable luma decimation
Normal Cb, Cr order
Invert Cb, Cr order
4
0
D829BDSA
Reserved
3
0
0x0B—Miscellaneous Control Register (CONTROL)
CON_MSB
2
0
4.0 Control Register Definitions
SAT_U_MSB
1
0
SAT_V_MSB
0
0
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