cxd2548r Sony Electronics, cxd2548r Datasheet - Page 78

• Manufacturer Part Number: cxd2548r
• Description: Cd Digital Signal Processor With Built-in Digital Servo And Dac
• Manufacturer: Sony Electronics

§4-4. E:F Balance Adjustment Function
When the disc is rotated with the laser on, and with the FCS (focus) servo on via FCS Search (focus search),
the traverse waveform appears in the TE signal due to disc eccentricity.
In this condition, the low-frequency component can be extracted from the TE signal using the built-in TRK hold
filter by setting D5 (TBLM) of $38 to 1.
The extracted low-frequency component is loaded into the TRVSC register as a digital value, and the TRVSC
register value is established when TBLM returns to 0.
Next, setting D2 (TLC2) of $38 to 1 applies only the amount of compensation (subtraction) equal to the TRVSC
register value to the values obtained from the TE and SE input pins, enabling the E:F balance offset to be
adjusted. (See Fig. 4-2.)
§4-5. FCS Bias (Focus Bias) Adjustment Function
The FBIAS register value can be added to the FCS servo filter input by setting D14 (FBON) of $3A to 1. (See
Fig. 4-2.)
When the FBIAS register value is set to D11 = 0 and D10 = 1 by $34F, data can be written using the 9-bit
value of D9 to D1 (D9: MSB).
In addition, the RF jitter can be monitored by setting the SOCT and SLO commands of $B to 1. (See "DSP
Block Timing Chart".)
The FBIAS register can be used as a counter by setting D13 (FBSS) of $3A to 1. It operates as an up/down
counter. The FBIAS register functions as an up counter when D12 (FBUP) of $3A = 1, and as a down counter
when D12 (FBUP) of $3A = 0.
The number of up and down steps can be changed by setting D11 and D10 (FBV1 and FBV0) of $3A.
When using the FBIAS register as a counter, the counter stops when the value set beforehand in FBL9 to 1 of
$34 matches the FCSBIAS value. Also, if the upper 8 bits of the command register are $3A at this time, the
counter stop can be monitored through SENS.
LIMIT value
(FBL9 to 1)
SENS pin
FBIAS setting value
(FB9 to 1)
A
Fig. 4-1.
B
C
– 78 –
A: Register mode
B: Counter mode
C:Counter mode (when stopped)
Here, the FBIAS setting values FB9 to 1 and the
FBIAS LIMIT values FBL9 to 1 are assumed to
be set in status A. For example, if command
registers FBUP = 0, FBV1 = 0, FBV0 = 0 and
FBSS = 1 are set from this status, down count
starts from status A and approaches the set
LIMIT value. When the LIMIT value is reached
and the FBIAS value matches FBL9 to 1, the
counter stops and the SENS pin goes to high.
Note that the up/down counter changes with
each sampling cycle of the focus servo filter. The
number of steps by which the count value
changes can be selected from 1, 2, 4 or 8 steps
by FBV1 and FBV0. When converted to FE
input, 1 step corresponds to approximately 3.9
[mV].
CXD2548R