cxd2548r Sony Electronics, cxd2548r Datasheet - Page 96

• Manufacturer Part Number: cxd2548r
• Description: Cd Digital Signal Processor With Built-in Digital Servo And Dac
• Manufacturer: Sony Electronics

FBON:
FBSS:
FBUP:
FBV1, FBV0: FBIAS (focus bias) counter voltage switching
TJD0:
FPS1, FPS0: Gain setting when transferring data from the focus filter to the PWM block.
TPS1, TPS0: Gain setting when transferring data from the tracking filter to the PWM block.
CEIT:
SJHD:
INBK:
MT10:
$3A
D15
0
FBON FBSS FBUP FBV1 FBV0
D14
This sets the tracking servo filter data RAM to 0 when switched from track jump to servo on only
when SFJP = 1 (during surf jump operation).
This is effective for increasing the overall gain in order to widen the servo band.
Operation when FPS1, FPS0 (TPS1, TPS0) = 00 is the same as usual (7-bit shift). However,
6dB, 12dB and 18dB can be selected independently for focus (tracking) by setting the relative
gain to 0dB when FPS1, FPS0 (TPS1, TPS0) = 00.
FBIAS (focus bias) register addition (on/off)
The FBIAS register value is added to the signal loaded into the FCS In register by setting D14 to
1 (on).
FBIAS (focus bias) register/counter switching
The FCS BIAS register can be used as a counter by setting D13 to 1 (on).
FBIAS (focus bias) counter up/down operation switching
This performs counter up/down control when FBSS = 1. The FBIAS register functions as a down
counter with D12 set to 0, and as an up counter when set to 1.
FCS BIAS count-up steps is decided by these bits.
The CE pin input takes over the TE pin input by setting D3 to 1 (on). This means that the
registers and filters for TE input are used for CE input.
This holds the tracking filter output at the value when surf jump starts during surf jump.
When D2 is 0 (off), the brake circuit masks the tracking filter output signal with TRKCNCL which
is generated by taking the MIRR signal at the TZC edge. When D2 is set to 1 (on), the tracking
filter input is masked instead of the output.
The tracking filter input is masked when the MIRR signal is high by setting D1 to 1 (on).
D13
FPS1
FBV1
0
0
1
1
0
0
1
1
D12
FPS0
D11
0
1
0
1
FBV0
0
1
0
1
D10
Relative gain
+12dB
+18dB
D9
+6dB
0
Number of steps
0dB
TJD0 FPS1 FPS0 TPS1 TPS0 CEIT SJHD INBK MTI0
D8
1
2
4
8
– 96 –
D7
TPS1
D6
0
0
1
1
The counter changes once for each
sampling cycle of the focus servo filter.
When MCK is 128Fs, the sampling
frequency is 88.2kHz. When converted to
FE input, 1 step is approximately 3.9 [mV].
D5
TPS0
0
1
0
1
D4
Relative gain
D3
+12dB
+18dB
+6dB
0dB
D2
D1
CXD2548R
D0