ST72321AR STMICROELECTRONICS [STMicroelectronics], ST72321AR Datasheet - Page 15

• Manufacturer Part Number: ST72321AR
• Description: 64/44-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC,FIVE TIMERS, SPI, SCI, I2C INTERFACE
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Address
002Ah
002Bh
002Ch
002Dh
002Eh
003Ah
003Bh
003Ch
003Dh
003Eh
003Fh
004Ah
004Bh
004Ch
004Dh
004Eh
004Fh
0030h
0031h
0032h
0033h
0034h
0035h
0036h
0037h
0038h
0039h
0040h
0041h
0042h
0043h
0044h
0045h
0046h
0047h
0048h
0049h
0050h
0051h
0052h
0053h
0054h
0055h
0056h
0057h
to
WATCHDOG
TIMER A
TIMER B
Block
MCC
SCI
WDGCR
SICSR
MCCSR
MCCBCR
TACR2
TACR1
TACSR
TAIC1HR
TAIC1LR
TAOC1HR
TAOC1LR
TACHR
TACLR
TAACHR
TAACLR
TAIC2HR
TAIC2LR
TAOC2HR
TAOC2LR
TBCR2
TBCR1
TBCSR
TBIC1HR
TBIC1LR
TBOC1HR
TBOC1LR
TBCHR
TBCLR
TBACHR
TBACLR
TBIC2HR
TBIC2LR
TBOC2HR
TBOC2LR
SCISR
SCIDR
SCIBRR
SCICR1
SCICR2
SCIERPR
SCIETPR
Register
Label
Watchdog Control Register
System Integrity Control/Status Register
Main Clock Control / Status Register
Main Clock Controller: Beep Control Register
Timer A Control Register 2
Timer A Control Register 1
Timer A Control/Status Register
Timer A Input Capture 1 High Register
Timer A Input Capture 1 Low Register
Timer A Output Compare 1 High Register
Timer A Output Compare 1 Low Register
Timer A Counter High Register
Timer A Counter Low Register
Timer A Alternate Counter High Register
Timer A Alternate Counter Low Register
Timer A Input Capture 2 High Register
Timer A Input Capture 2 Low Register
Timer A Output Compare 2 High Register
Timer A Output Compare 2 Low Register
Timer B Control Register 2
Timer B Control Register 1
Timer B Control/Status Register
Timer B Input Capture 1 High Register
Timer B Input Capture 1 Low Register
Timer B Output Compare 1 High Register
Timer B Output Compare 1 Low Register
Timer B Counter High Register
Timer B Counter Low Register
Timer B Alternate Counter High Register
Timer B Alternate Counter Low Register
Timer B Input Capture 2 High Register
Timer B Input Capture 2 Low Register
Timer B Output Compare 2 High Register
Timer B Output Compare 2 Low Register
SCI Status Register
SCI Data Register
SCI Baud Rate Register
SCI Control Register 1
SCI Control Register 2
SCI Extended Receive Prescaler Register
Reserved area
SCI Extended Transmit Prescaler Register
Reserved Area (3 Bytes)
Reserved Area (1 Byte)
Register Name
3
3
3
3
000x 000x b R/W
x000 0000b
xxxx x0xx b
xxxx x0xx b
Status
Reset
FFh
FCh
FFh
FCh
FFh
FCh
FFh
FCh
C0h
7Fh
00h
00h
00h
00h
80h
00h
80h
00h
00h
00h
80h
00h
80h
00h
00h
00h
00h
00h
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
---
R/W
R/W
R/W
R/W
R/W
R/W
Read Only
Read Only
R/W
R/W
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
R/W
R/W
R/W
R/W
R/W
Read Only
Read Only
R/W
R/W
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
R/W
R/W
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
ST72321
Remarks
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