ST72321AR STMICROELECTRONICS [STMicroelectronics], ST72321AR Datasheet - Page 160

• Manufacturer Part Number: ST72321AR
• Description: 64/44-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC,FIVE TIMERS, SPI, SCI, I2C INTERFACE
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST72321
CONTROL PIN CHARACTERISTICS (Cont’d)
Figure 89. RESET pin protection when LVD is enabled.
Figure 90. RESET pin protection when LVD is disabled.
1. The reset network protects the device against parasitic resets.
2. The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad. Otherwise the device
can be damaged when the ST7 generates an internal reset (LVD or watchdog).
3. Whatever the reset source is (internal or external), the user must ensure that the level on the RESET pin can go below
the V
4. Because the reset circuit is designed to allow the internal RESET to be output in the RESET pin, the user must ensure
that the current sunk on the RESET pin (by an external pull-up for example) is less than the absolute maximum value
specified for I
5. When the LVD is enabled, it is mandatory not to connect a pull-up resistor and a capacitor to V
160/189
Required
EXTERNAL
CIRCUIT
RESET
IL
USER
max. level specified in
Recommended
INJ(RESET)
EXTERNAL
RESET
in
V
DD
section 12.2.2 on page
Recommended
0.01µF
0.01µF
Section
0.01µF
V
12.9.1. Otherwise the reset will not be taken into account internally.
DD
4.7kΩ
139.
V
V
DD
DD
R
R
ON
ON
Filter
Filter
1)2)3)4)5)
1)2)3)
GENERATOR
GENERATOR
PULSE
PULSE
DD
on the RESET pin.
INTERNAL
RESET
INTERNAL
RESET
WATCHDOG
WATCHDOG
LVD RESET
ST72XXX
ST72XXX