ST72321AR STMICROELECTRONICS [STMicroelectronics], ST72321AR Datasheet - Page 41

• Manufacturer Part Number: ST72321AR
• Description: 64/44-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC,FIVE TIMERS, SPI, SCI, I2C INTERFACE
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

8 POWER SAVING MODES
8.1 INTRODUCTION
To give a large measure of flexibility to the applica-
tion in terms of power consumption, four main
power saving modes are implemented in the ST7
(see
TIVE HALT and HALT.
After a RESET the normal operating mode is se-
lected by default (RUN mode). This mode drives
the device (CPU and embedded peripherals) by
means of a master clock which is based on the
main oscillator frequency divided or multiplied by 2
(f
From RUN mode, the different power saving
modes may be selected by setting the relevant
register bits or by calling the specific ST7 software
instruction whose action depends on the oscillator
status.
Figure 24. Power Saving Mode Transitions
OSC2
Figure
).
24): SLOW, WAIT (SLOW WAIT), AC-
ACTIVE HALT
SLOW WAIT
POWER CONSUMPTION
SLOW
HALT
WAIT
RUN
Low
High
8.2 SLOW MODE
This mode has two targets:
– To reduce power consumption by decreasing the
– To adapt the internal clock frequency (f
SLOW mode is controlled by three bits in the
MCCSR register: the SMS bit which enables or
disables Slow mode and two CPx bits which select
the internal slow frequency (f
In this mode, the master clock frequency (f
can be divided by 2, 4, 8 or 16. The CPU and pe-
ripherals are clocked at this lower frequency
(f
Note: SLOW-WAIT mode is activated when enter-
ing the WAIT mode while the device is already in
SLOW mode.
Figure 25. SLOW Mode Clock Transitions
CPU
internal clock in the device,
the available supply voltage.
).
CP1:0
SMS
f
CPU
f
OSC2
f
FREQUENCY
OSC2
00
NEW SLOW
REQUEST
/2
01
CPU
f
OSC2
NORMAL RUN MODE
).
/4
REQUEST
ST72321
CPU
f
OSC2
41/189
OSC2
) to
)