ST72321AR STMICROELECTRONICS [STMicroelectronics], ST72321AR Datasheet - Page 186

no-image

ST72321AR

Manufacturer Part Number
ST72321AR
Description
64/44-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC,FIVE TIMERS, SPI, SCI, I2C INTERFACE
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
ST72321
duration is always correct assuming the applica-
tion is not doing anything between the idle and the
break. This can be ensured by temporarily disa-
bling interrupts.
The exact sequence is:
- Disable interrupts
- Reset and Set TE (IDLE request)
- Set and Reset SBK (Break Request)
- Re-enable interrupts
15.1.7 16-bit Timer PWM Mode
In PWM mode, the first PWM pulse is missed after
writing the value FFFCh in the OC1R register
(OC1HR, OC1LR). It leads to either full or no PWM
during a period, depending on the OLVL1 and
OLVL2 settings.
15.1.8 I2C Multimaster
In multimaster configurations, if the ST7 I2C re-
ceives a START condition from another I2C mas-
ter after the START bit is set in the I2CCR register
and before the START condition is generated by
the ST7 I2C, it may ignore the START condition
from the other I2C master. In this case, the ST7
master will receive a NACK from the other device.
On reception of the NACK, ST7 can send a re-start
and Slave address to re-initiate communication
15.1.9 Read-out protection with LVD
The LVD is not supported if Readout protection is
enabled.
15.2 ALL FLASH DEVICES
15.2.1 Internal RC Oscillator with LVD
The internal RC can only be used if LVD is ena-
bled.
15.3 LIMITATIONS SPECIFIC TO REV Q AND
REV S FLASH DEVICES
15.3.1 ADC Accuracy
The improved ADC accuracy specifications given
in
186/189
Section 12.12.3
do not apply to Rev Q and Rev
S devices. Their accuracy remains as specified in
the previous datasheet revision and summarized
in the table below.
To identify these parts, check the internal sales
type on the box label or the trace code marking on
the package.
15.4
DEVICES
15.4.1 LVD Operation
Depending on the operating conditions, especially
the V
in some cases the LVD may not start. When this
occurs, the MCU may operate outside the guaran-
teed functional area (see datasheet Figure 76)
without being forced into reset state.
In this case, proper use of the watchdog may
make it possible to recover through a watchdog re-
set and allow normal operations to resume.
Consequently, the LVD function is not guaranteed
in the current silicon revision. For complete securi-
ty, an external reset circuit must be added.
Symbol
Rev
Rev Q
Rev S
Rev 9 (full
spec)
|E
|E
|E
|E
|E
O
G
D
T
L
|
|
DD
|
|
|
LIMITATIONS
ramp up speed and ambient temperature,
Total unadjusted
error
Offset error
Gain Error
Differential linearity
error
Integral linearity er-
ror
Parameter
Internal Salestype Trace Code
72F321xxx$A2
72F321xxx$U2
72F321xxx$A8
72F321xxx$U8
72F321xxx$A3
72F321xxx$U3
SPECIFIC
Typ
0.5
1.5
1.5
4
3
813xxxQ
813xxxQ
813xxxS
813xxxS
813xxx9
813xxx9
Max
4.5
4.5
4.5
6
5
TO
Unit
LSB
ROM

Related parts for ST72321AR