bt865a Conexant Systems, Inc., bt865a Datasheet - Page 31

• Manufacturer Part Number: bt865a
• Description: Ycrcb To Ntsc/pal Digital Video Encoder
• Manufacturer: Conexant Systems, Inc.

Bt864A/Bt865A Data Sheet
1.5.10
1.5.11
1.5.12
1.5.13
100138C
02/17/03
Vertical Blanking Intervals
Noninterlaced Operation
Subcarrier Phasing
BLANK* Pin
In order to maintain correct SC-H phasing, the subcarrier phase is set to zero on the
falling edge of HSYNC* associated with VSYNC* every four (NTSC) or eight (PAL)
fields, unless the SCRESET bit is set to a logical one.
In slave mode, falling HSYNC* may lag falling VSYNC* by 1/4 scan line but cannot
precede falling VSYNC* by more than seven CLK periods for correct SC-H reset.
Setting SCRESET to one may be useful in situations where the ratio of CLK/2 to
HSYNC* edges in a color frame is noninteger, which could produce a significant
phase impulse by resetting to zero.
For interlaced NTSC/PAL–M, if EVBI = 0, scan lines 1–21 and 263–284, inclusive,
are always blanked regardless of the BLANK* input (SMPTE line numbering
convention).
For interlaced PAL–B, D, G, H, I, N, Nc, if EVBI = 0, scan lines 1–23, 311–335, and
624–625, inclusive, are always blanked regardless of the BLANK* input.
For noninterlaced NTSC/PAL–M, if EVBI = 0, scan lines 1–17 and 261–262,
inclusive, are always blanked regardless of the BLANK* input. For noninterlaced
PAL–B, D, G, H, I, N, Nc, if EVBI = 0, scan lines 1–22 and 311–312, inclusive, are
always blanked regardless of the BLANK* input.
Alternately, all displayed lines in the vertical blanking interval (10–21 and 273–284
for interlaced NTSC/PAL–M; 6–23 and 320–335 for interlaced PAL–B, D, G, H, I, N,
Nc; 10–21 for noninterlaced NTSC/PAL–M, 7–23 for noninterlaced PAL–B, D, G, H,
I, N, Nc) may be enabled by setting the EVBI bit to a logical one (except for caption
lines controlled by bits ECCF1 or ECCF2, or the Macrovision process).
The BLANK* pin can be used to BLANK any portion of the active display lines
(including those enabled by EVBI) by driving the pin to a logical zero.
When the Bt864A/Bt865A is programmed for noninterlaced master mode, the
Bt864A/Bt865A always displays FIELD 1, meaning that the falling edges of
HSYNC* and VSYNC* will be output coincidentally. FIELD will be held low if
FIELDI = 0. Additionally, a 30 Hz offset will be subtracted from the color subcarrier
frequency while in NTSC mode so that the color subcarrier phase will be inverted
from field to field.
Transition from interlaced to noninterlaced in master mode, occurs during FIELD 1 to
prevent synchronization disturbance. In slave mode, transition occurs after a
subsequent falling edge of VSYNC*.
NOTE:
Consumer VCRs can record noninterlaced video with minor noise artifacts,
but special effects (e.g., scan > 2x) may not function properly.
Conexant
Circuit Description
1-21