mx25l1605mi-20g Macronix International Co., mx25l1605mi-20g Datasheet - Page 26

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mx25l1605mi-20g

Manufacturer Part Number
mx25l1605mi-20g
Description
Tm Macronix Nbit Memory Family Tm 16m-bit [x 1] Cmos Serial Eliteflash Memory
Manufacturer
Macronix International Co.
Datasheet
Notes: In serial RDID and RDSR mode, output pin SO will be enabled at 8th clock's rising edge. That means, MXIC's drip
will enable output half a cycle in advance compare with other compatible vendor's spec.
Figure 15. Read Status Register (RDSR) Sequence (Command 05)
Figure 16. Write Status Register (WRSR) Sequence (Command 01)
Figure 17. Read Data Bytes (READ) Sequence (Command 03)
Notes: In READ mode, FAST_READ mode, RES mode and REMS mode, MXIC IC will enable output an entire cycle in
advance compare with other compatible vendor's spec. Detail condition please reference the waveform.
P/N: PM1168
CS#
SCLK
SI
SO
CS#
SCLK
SI
SO
CS#
SCLK
SI
SO
0
1
0
High-Z
High-Z
2
1
command
3
2
03
command
4
3
05
5
4
0
6
5
1
7
High-Z
6
2
MSB
23 22 21
command
8
X
7
3
MSB
01
7
9 10
8
4
24-Bit Address
6
Status Register Out
9 10 11 12 13 14 15
5
5
26
6
28 29 30 31 32 33 34 35 36 37 38
3
4
7
MSB
2
3
7
8
1
2
6
9 10 11 12 13 14 15
X
0
1
5
MSB
Register In
7
0
4
Status
MSB
6
7
3
5
6
Status Register Out
Data Out 1
2
4
MX25L1605
5
1
3
4
0
2
3
1
2
0
39
1
7
0
Data Out 2
7
REV. 1.3, NOV. 06, 2006

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