lxt6155 Intel Corporation, lxt6155 Datasheet
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lxt6155 Summary of contents
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... LXT6155 155 Mbps SDH/SONET/ATM Transceiver The LXT6155 is a high speed fully integrated transceiver designed for 155 Mbps SDH/SONET/ ATM transmission system applications. The LXT6155 provides a LVPECL interface for fiber optics modules, and a CMI interface for coax cable drive. These circuits are implemented using Level One’ ...
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... Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com. Copyright © Intel Corporation, 2001 *Third-party brands and names are the property of their respective owners. ® ...
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... Parallel/Serial Mode Selection (SP pin) .................................... 21 2.5.1.5 Tx Amplitude Trim ..................................................................... 21 2.5.2 Software Mode ....................................................................................... 22 2.5.2.1 Serial Input Clock (SCLK) ......................................................... 22 2.5.2.2 Chip Select Input (CS)............................................................... 22 2.5.2.3 Serial Input Word (SDI) ............................................................. 22 2.5.2.4 Serial Output Word (SDO)......................................................... 22 2.6 Serial System Interface ....................................................................................... 23 2.7 Parallel System Interface .................................................................................... 23 2.8 Loopback Modes .................................................................................................24 2.8.1 Local Loopback ...................................................................................... 24 2.8.2 Remote Loopback .................................................................................. 25 Datasheet 155 Mbps SDH/SONET/ATM Transceiver — LXT6155 ......................................................8 ........................................................................................... 13 3 ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver 3.0 Register Definitions 4.0 Application Information 4.1 Fiber Optic Module Interface ............................................................................... 33 4.2 Coax Interface ..................................................................................................... 33 5.0 Test Specifications 6.0 Mechanical Specifications 7.0 Notes ............................................................................................................................. 49 Figures 1 LXT6155 Pin Assignments ................................................................................. 8 2 LXT6155 System Interface.................................................................................. 14 3 Framing State...................................................................................................... 16 4 Criteria for LOS Output ....................................................................................... 16 5 Receive Frame Synchronization and Frame Pulse Position ............................... 17 6 Example of CMI Encoded Binary Signal ...
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... Revision History Datasheet 155 Mbps SDH/SONET/ATM Transceiver — LXT6155 5 ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver 6 Datasheet ...
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... Figure 1. LXT6155 Block Diagram m P Control (CS, SCLK, SDI, SDO), Hardware (MODE0, SP, CIS, RIFE) TTIP1 TRING1 TTIP0 TRING0 Local Loopback RTIP Adaptive Equalizer RRING RXISH Datasheet 155 Mbps SDH/SONET/ATM Transceiver — LXT6155 Optional RLIS, 19.4MHz crystal LLIS 4 HWSEL 2 XTALIN Control Control Logic Registers CMI Parallel/ ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver 1.0 Pin Assignments and Signal Descriptions Figure 1. LXT6155 Pin Assignments XTALIN 1 XTALOUT 2 TAGND 3 TXISH 4 5 TAVCC TDVCC 6 TSICLKP 7 TSICLKN 8 TPOS 9 10 TNEG 11 TDGND 12 CS/MODE SCLK/SP 13 SDI/CIS 14 SDO/RIFE 15 16 TPID7 LXT6155LE 40 (top view) ...
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... SCLK. Clock Input Select, hardware mode (HWSEL = Low). CIS sets the reference clock for centering the Rx PLL. If CIS = Low, then the LXT6155 uses the transmit input clock as the reference. If CIS = High, then the LXT6155 uses the crystal clock input (XTALIN) as the reference. ...
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... Transmit Parallel Input Data. Transmit data from an Overhead Terminator at parallel speed 19.44 MHz, clocked in by TPICLK. TPID7 is the most significant bit, and is the first bit to be sent. These pins should be grounded or not connected when the LXT6155 is used in serial mode. TTL Transmit Parallel Input Clock. Parallel transmit clock at 19.44 MHz. ...
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... Together with LLIS sets LXT6155 in a loopback test mode. See Table 4 TTL Address 1, software mode (HWSEL = High). This pin together with ADDR0 sets the chip select address LXT6155 chips can be addressed by the P interface. Local Loopback Input Select, hardware mode (HWSEL = Low). ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver Table 1. LXT6155 Pin Descriptions (Continued) 1 Pin # Symbol I/O 62 TRING1 DO 63 TTIP1 64 TVCC Digital Input Digital Output; DI/O = Digital Input/Output Analog Input Analog Output; AI/O = Analog Input/Output; S=Supply. 2. TTL = Transistor-to-Transistor Logic (5V tolerant); LVPECL = Low-Voltage positive ECL Type Transmit Output Data, positive (TTIP1) and negative (TRING1) ...
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... The LXT6155 is a front-end transceiver designed for 155 Mbps OC3/STM1/ATM transmission applications. Table 2 lists the standards with which the LXT6155 is compliant. The LXT6155 interfaces to either a fiber transceiver or a coax cable on the line side, and on the system side SDH/SONET Overhead Terminator or an ATM UNI. The LXT6155 can function in Hardware stand-alone mode Software mode controlled through an industry standard Motorola compatible 4-wire serial microprocessor interface ...
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... Tx Clock Monitoring The LXT6155 provides transmit clock monitoring for both serial and parallel operating modes. When using the crystal clock as a reference, the LXT6155 monitors the TSICLKP/TSICLKN or the TPICLK input(s) for transitions transition is seen within 200ns, the tx_clk_alarm flag will be set (reg #15) and the transmitter outputs ttip1/tring1 or ttip0/tring0 will stop sending data to the line ...
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... In HW mode (HWSEL = Low) ROFP asserts (high) on the third A2 byte mode (HWSEL = High) this position is programmable via register #13, bits <6:3>. When byte alignment is disabled and the LXT6155 is in CMI mode, the ROFP pin indicates CMI coding errors including polarity errors for ones and inversion errors for zeroes. The clock recovery PLL’ ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver frames with incorrect frame words are required. Byte alignment occurs when entering the in-frame state. In case of an OOF event, the byte alignment and frame pulse position are frozen. The ROFP output continues unchanged until re-entering the in-frame state. ...
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... Table 2. Standards Compliance Item Line Rate (Mbps) Line Interface Line Code Signal Templates Jitter Figure 6. Example of CMI Encoded Binary Signa 0 Binary CMI T/2 T/2 T Datasheet 155 Mbps SDH/SONET/ATM Transceiver — LXT6155 End of Previous Frame - ...
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... Receive Serial Output Clock (RSOCLKP/RSOCLKN) RSOCLKP/RSOCLKN is the serial clock recovered from the line input data on RTIP/RRING. This 155.52 MHz clock is falling edge centered with receive serial output data on RPOS/RNEG. These clock pins should be left open when the LXT6155 operates in parallel mode. Under LOS 18 Datasheet ...
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... Jitter Generation (Intrinsic Jitter) Jitter generation is the amount of transmit jitter at the output of the equipment with a jitter-free transmit input data and clock. For SONET/SDH, jitter generation is less than 0.01 UI rms, measured with a band-pass filter from 12 kHz to 1.3 MHz. Refer page 45 for the LXT6155 performance. 2.4.3 ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver 2.5.1 Hardware Mode By setting HWSEL = Low, the LXT6155 operates in standalone hardware mode, without a serial microprocessor interface. A subset of the functions available in the Software Mode can be set in Hardware Mode. LXT6155 provides a comprehensive flexibility in configuring system clock preference settings, as well as providing pins for activating loopback test modes. Tables 3, 4 and 5 show the settings that enable the functions available in hardware mode ...
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... In Local loopback, the transmit data is looped back to the receive input at the line interface. The LXT6155 also transmit data onto the line interface while looping back. For descriptive diagrams, please refer to Figures 13 and 14. ...
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... Serial Input Clock (SCLK) This pin accepts a clock up to 4.096 MHz for data transactions between the LXT6155 and the SCP bus. The LXT6155 clocks SDO data out on the falling edge, and clocks SDI data in on the rising edge of SCLK (see Figures 9 and 10). ...
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... Mbps. Data and clock lines are differential 3.3V LVPECL signals. Refer to Figure 11. 2.7 Parallel System Interface Parallel interface allows the LXT6155 to communicate with the system chip at 19.44 MHz, 8 bits per clock cycle. Data and clock lines are TTL compatible signals. Refer to Figure 12. Datasheet 155 Mbps SDH/SONET/ATM Transceiver — ...
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... LOS, ROFP/ CMIERR 2.8 Loopback Modes The LXT6155 provides two loopback modes that can be executed in either hardware or software mode: local loopback and remote loopback. In remote loopback mode, the crystal reference clock is used to center the receive PLL to prevent illegal clock looping. 2.8.1 Local Loopback Local loopback routes the transmit line output signals (TTIP and TRING) back to the receive line inputs (RTIP and RRING) ...
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... Figure 14). In this mode, system outputs (RPOD<7:0> or RPOS/RNEG) are still active. Figure 13. Local Loopback TTIP0, TRING0, TTIP1, TTIP1 RTIP, RRING Figure 14. Remote Loopback TTIP0, TRING0, TTIP1, TTIP1 RTIP, RRING Equalizer Datasheet 155 Mbps SDH/SONET/ATM Transceiver — LXT6155 Line P/S Buffer Equalizer PLL S/P Line P/S Buffer PLL S/P TPID < ...
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... Device Address/Control Byte A<6:0> A<6:5> LXT6155 Device Select. By using pins ADDR1 and ADDR0 four LXT6155 devices can be addressed. For a successful data transaction to occur, A6 and A5 must match the polarity settings on ADDR1 and ADDR0, respectively. Using these controls four LXT6155 devices can be independently controlled. ...
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... Datasheet 155 Mbps SDH/SONET/ATM Transceiver — LXT6155 Description Local loopback loopback 1 = Activate local loopback Remote loopback loopback 1 = Activate remote loopback PLL/Equalizer reference clock control Use TPICLK clock 1 = Use external crystal (XTALIN) Not used ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver . Table 10. Transmit PLL1, Register #2 (Address A<3:0>=0010) Bit Default Mnemonic 7:5 0.1.1 4:3 0.0 2:1 1 Table 11. Transmit PLL2, Register #3 (Address A<3:0>=0011) Bit Default Mnemonic 1:0 1.0 Table 12. Equalizer Load, Register #4 (Address A<3:0>=0100) Bit Default Mnemonic 7 0 6:2 0.0.0.0.0 1 ...
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... Mnemonic 7:5 0.1.1 4:3 0 Datasheet 155 Mbps SDH/SONET/ATM Transceiver — LXT6155 Description AGC adaption step size Analog front end enable (also enables matching filter oscillator core disabled (no bias enabled Description Not for customer use Not for customer use ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver Table 17. Rx PLL 2, Register #9 (Address A<3:0>=1001) Bit Default Mnemonic 5:3 0.1.1 freq_det_pw Table 18. Test, Register #10 (Address A<3:0>=1010) Bit Default Mnemonic 7 1 los_clk_ena 6 0 5:2 0.0.0 Table 19. Register, Bias and Fuse Controls, Register #11 (Address A<3:0>=1011) ...
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... Datasheet 155 Mbps SDH/SONET/ATM Transceiver — LXT6155 Description LOS disable controls (amplitude LOS & digital LOS disable 1 = enable Byte align enable: If used, this feature must be enabled during system configuration prior to applying data to the receiver. If this is not possible see application note AN141 for further details. ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver Table 22. Read-only Register #15 (Address A<3:0>=1111) Value of: stat_cont bit 7 bit 6 00 Analog LOS Digital LOS (Status register) 01 Not for customer use 02 Not for customer use 03 (Fuse contents- upper bits) 04 Not for customer use (Fuse contents- upper bits) ...
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... LXT6155 application note AN141. 4.2 Coax Interface As shown page 35, the LXT6155 directly drives a transformer connected cable, up to12.7dB cable loss at 78MHz. This is approximately 110m of RG59U. Please refer to manufacturers specifications for maximum cable lengths. Output CMI waveform conform to the ITU G.703 specifications. Rise and fall times are less than 2.0 ns. ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver Figure 16. 3.3 V LVPECL to 3.3 V LVPECL Interface 49 RXISH 330 nF 48 VBIAS 15k TXISH 68nF 47 NC ATST LXT6155 LXT6155 1) R1,R2,R5,R6 = 127 Ohms R3,R4,R7,R8 = 87.5 Ohms 1% 3) Transmission lines should be 50 ohm, controlled impedance strip lines. Keep length as short as possible. ...
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... Parameter -3dB Low Transmission, S12 -3dB High -20dB Low Return Loss, S11 -20dB High In-band Loss Common mode rejection Cross-talk in dual packages Turns ratio Datasheet 155 Mbps SDH/SONET/ATM Transceiver — LXT6155 1 RTIP 75 ohm, 37.5 ohm strip line 1% 51 RRING Vcc 37.5 ohm, 37 ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver Table 24. Crystal Specifications Parameter Center frequency Freq tolerance Temperature drift Aging Mode Shunt capacitance Equivalent resistance Temperature Range 36 Min Typ Max Unit 19.44 MHz -20 20 ppm -20 20 ppm -10 10 ppm Fundamental 5 pF 8 Notes ...
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... Test Specifications Information in Table 25 through 34 and Figures 18 through 28 represent the performance specifications of the LXT6155 and are guaranteed by test, except as noted by design. Table 25. Absolute Maximum Ratings Parameter DC supply (reference to GND) Input voltage, TTL pins Input voltage, other pins Input current, any pin Storage temperature Operating at or beyond these limits may result in damage to the device ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver Table 28. Transmit Timing Characteristics (See Figures 18 and 19) Parameter Transmit serial input clock frequency Transmit serial input clock frequency error Transmit serial input clock duty cycle Transmit serial input clock and data rise /fall 2 time Transmit parallel input clock frequency ...
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... Reference Input Clock into XTALIN pin (TTL) 1. Typical values are at 25C and 3.3V. They are for design aid only; not guaranteed and not subject to production testing. 2. Not production tested, guaranteed by design and other correlation factors. Datasheet 155 Mbps SDH/SONET/ATM Transceiver — LXT6155 1 Note Min Typ Max 0 ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver Table 30. Receive Timing Characteristics (See Figures 20 and 21) (Continued) Parameter Reference Clock Offset from Nominal 1. Typical values are at 25C and 3.3V. They are for design aid only; not guaranteed and not subject to production testing. 2. Not production tested, guaranteed by design and other correlation factors. ...
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... CS to SCLK setup time SCLK to CS hold time CS inactive time SCLK to SDO valid 1. Typical values are at 25C and 3.3V. They are for design aid only; not guaranteed and not subject to production testing. Datasheet 155 Mbps SDH/SONET/ATM Transceiver — LXT6155 1 Note Min Typ Max ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver Parameter SCLK falling edge to SDO high Z CS rising edge to SDO high Z 1. Typical values are at 25C and 3.3V. They are for design aid only; not guaranteed and not subject to production testing. Figure 22. Microprocessor Input Timing Diagram ...
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... Nominal 0.05 zero level –0.05 (Note 2) –0.40 –0.45 –0.50 –0.55 –0.60 Datasheet 155 Mbps SDH/SONET/ATM Transceiver — LXT6155 1.608 ns 0 0. 1.608 ns 1.608 ns (Note 1) Negative transitions Positive transition at mid-unit interval T = 6.43 ns Nominal pulse 0.1 ns 3.215 ns 3 ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver Note: The maximum “steady state” amplitude should not exceed the 0.55 V limit. Overshoots and other transients are permitted to fall into the dotted area. Note: With the signal applied, the vertical position of the trace can be adjusted with the objective of meeting the limits of the masks ...
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... Table 33. Jitter Generation Signal Table 34. Jitter Transfer Figure 27. Generation Measurement Filter Characteristics 0 dB Datasheet 155 Mbps SDH/SONET/ATM Transceiver — LXT6155 f1 f2 OC3 12 kHz 1.3 MHz STM1 500 Hz 1.3 MHz 65 kHz 1.3 MHz Signal f1 A1 OC3 230 kHz 0.4 STM1 230 kHz 0.4 f1 Measured Jitter 0.01 UI rms 0.1 UIpp 1 ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver Figure 28. Typical Coax Jitter Transfer -10 -20 -30 - Note: Measured with the device in remote loopback. Data reflects total jitter in both Tx and Rx path 46 Coax mode LXT6155 spec. ITU G.825 template 100 1000 10000 Frequency [Hz] ...
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... -10 -20 -30 - Note: Measured with the device in remote loopback. Data reflects total jitter in both Tx and Rx path Datasheet 155 Mbps SDH/SONET/ATM Transceiver — LXT6155 Fiber mode LXT6155 spec. ITU G.825 spec. 100 1000 10000 100000 1000000 1E+07 Frequency [Hz ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver 6.0 Mechanical Specifications Figure 30. LXT6155LE Package Specification 64-pin Low-profile Quad Flat Pack — Part Number LXT6155LE — Extended Temperature Range: -40° °C Dim BSC—Basic Spacing between Centers ...
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... Notes Datasheet 155 Mbps SDH/SONET/ATM Transceiver — LXT6155 49 ...
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... LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver 50 Datasheet ...