lxt6155 Intel Corporation, lxt6155 Datasheet - Page 40

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lxt6155

Manufacturer Part Number
lxt6155
Description
155 Mbps Sdh/sonet/atm Transceiver
Manufacturer
Intel Corporation
Datasheet

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LXT6155 — 155 Mbps SDH/SONET/ATM Transceiver
Reference Clock Offset from
Nominal
1. Typical values are at 25C and 3.3V. They are for design aid only; not guaranteed and not subject to production testing.
2. Not production tested, guaranteed by design and other correlation factors.
End to end loss budget (coax)
LOS - fiber
1. Typical values are at 25C and 3.3V. They are for design aid only; not guaranteed and not subject to production testing.
2. Not production tested, guaranteed by design and other correlation factors.
*This shows timing in HW mode. In SW mode (HWSEL=1) this clock polarity can be inverted. See Table 8 for details.
Table 30. Receive Timing Characteristics (See Figures 20 and 21) (Continued)
Figure 20. Receive Serial Output Data Timing (See Table 30)
Figure 21. Receive Parallel Output Data Timing (See Table 30)
Table 31. Receive Analog Characteristics
RPOCLK*
RPOD<0:7>
RSOCLKN
RPOS
RNEG
ROFP
RSOCLKP
Parameter
Parameter
1
De-assert
Assert
Note
Sym
-
RPOCLKPD
ROFPPD
-100
Min
Min
15
RSOCLKPD
187.5
Typ
Typ
20
1
1
Max
Max
100
Unit
Unit
ppm
dB
sec
sec
BER=1E-12. PRBS (23) data.
CMI encoded. Input white noise
= 5 mV RMS max.
No data transition. Default LOS
setting.
No LOS events. Default LOS
settings.
Test Conditions
Test Conditions
Datasheet

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