lxt6155 Intel Corporation, lxt6155 Datasheet - Page 39

• Manufacturer Part Number: lxt6155
• Description: 155 Mbps Sdh/sonet/atm Transceiver
• Manufacturer: Intel Corporation

Datasheet
Transmit output rise and fall times
1. Typical values are at 25C and 3.3V. They are for design aid only; not guaranteed and not subject to production testing.
2. Not production tested, guaranteed by design and other correlation factors.
Receive serial output clock
frequency
Receive serial output clock duty
cycle
Receive serial output clock and
data rise/fall time
RSOCLKP/RSOCLKN to RPOS/
RNEG propagation delay
Receive parallel output clock
frequency
Receive parallel output clock duty
cycle
Receive parallel output data &
clock rise/fall time
RPOCLK to RPOD<0:7>
propagation delay
RPOCLK to ROFP propagation
delay
Reference Input Clock into
XTALIN pin (TTL)
1. Typical values are at 25C and 3.3V. They are for design aid only; not guaranteed and not subject to production testing.
2. Not production tested, guaranteed by design and other correlation factors.
Transmit output amplitude - CMI
Transmit jitter transfer function
(Intrinsic jitter SONET spec)
Synthesizer capture range
Table 29. Transmit Analog Characteristics
Table 30. Receive Timing Characteristics (See Figures 20 and 21)
Transmit jitter generation
Transmit jitter generation
(Intrinsic jitter SDH spec)
Synthesizer track range
Synthesizer lock time
output impedance
TTIP0/TRING0
- CMI signals
Parameters
Parameter
peaking
signals
2
2
2
2
500 Hz - 1.3 MHz
12 kHz - 1.3 MHz
65 kHz - 1.3 MHz
DC - 230 kHz
RSOCLKpd
RPOCLKpd
RSOCLKdc
RSOCLKp
RSOCLKn
RPOCPdc
RPOCLKt
RPOCLK
ROFPpd
REFCLK
TRING0
TRING0
Ftrack
TTIP0
TTIP0
Tlock
Note
Fcap
Zout
Sym
-
155 Mbps SDH/SONET/ATM Transceiver — LXT6155
Min
Min
-0.5
-20
-20
0.9
1.6
45
45
2
0
0
155.52
19.44
19.44
Typ
Typ
2.0
1
1
0.075
Max
0.01
+20
+20
Max
100
0.1
1.5
0.4
2.2
1.1
1.2
1.5
55
55
5
7
4
UIrms
UIpp
UIpp
UIpp
Unit
ppm
ppm
Vpp
Unit
MHz
MHz
MHz
k
dB
ns
ns
ns
ns
ns
ns
%
%
s
PRBS(23) pattern. Transmit
input data and clock have no
input jitter. Receive line input is
all zeros.
PRBS(23) data. Input jitter as
shown in Figure 26.
parallel mode
10% - 90%
0m cable length
20% - 80%.
The REFCLK replaces the
crystal
Test Conditions
Test Conditions
39