dm9000a Davicom Semiconductor, Inc., dm9000a Datasheet - Page 39

• Manufacturer Part Number: dm9000a
• Description: Ethernet Controller With General Processor Interface
• Manufacturer: Davicom Semiconductor, Inc.

8.10 10BASE-T Configuration/Status (10BTCSR) - 18
Final
Version: DM9000A-17-DS-F01
May 10, 2006
18.15
18.14
18.13
18.12
18.10
18.11
-17.0
-18.1
17.3
18.9
Bit
ANMB[3:
SQUELCH
Bit Name
Reserved
Reserved
Reserved
JABEN
LP_EN
HBE
0]
0, RO
Default
1, RW
1, RW
1, RW
0, RW
0, RO
0, RO
1,RW
Auto-negotiation Monitor Bits
These bits are for debug only. The auto-negotiation status will be
written to these bits.
Reserved
Read as 0, ignore on write
Link Pulse Enable
1 = Transmission of link pulses enabled
0 = Link pulses disabled, good link condition forced
This bit is valid only in 10Mbps operation
Heartbeat Enable
1 = Heartbeat function enabled
0 = Heartbeat function disabled
When the DM9000A is configured for full duplex operation, this
bit will be ignored (the collision/heartbeat function is invalid in
full duplex mode), This bit is valid only in 10Mbps operation.
Squelch Enable
1 = Normal squelch
0 = Low squelch
Jabber Enable
Enables or disables the Jabber function when the DM9000A is in
10BASE-T full duplex or 10BASE-T transceiver Loopback
mode
1 = Jabber function enabled
0 = Jabber function disabled
Reserved
Force to 0, in application.
Reserved
Read as 0, ignore on write
B3 b2 b1 B0
0
0
0
0
0
0
0
0
Ethernet Controller with General Processor Interface
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
In IDLE state
Ability match
Acknowledge match
Acknowledge match fail
Consistency match
Consistency match fail
Parallel detects signal_link_ready
Parallel detects signal_link_ready fail
Description
DM9000A
39