ch7004c Chrontel, ch7004c Datasheet - Page 9

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ch7004c

Manufacturer Part Number
ch7004c
Description
Digital Pc To Tv Encoder With Macrovisiontm
Manufacturer
Chrontel
Datasheet

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Note: The AX[7:0] data is ignored.
When IDF = 9 (YCrCb 8-bit mode), H and V sync signals can be embedded into the data stream. In this mode, the
embedded sync will follow the CCIR656 convention, and the first byte of the “video timing reference code” will be
assumed to occur when a Cb sample would occur if the video stream was continuous. This is delineated in Table 9
shown below.
201-0000-024 Rev. 2.4, 6/24/2004
Table 7. RGB 16-bit Muliplexed Mode
Table 8. YCrCb Multiplexed Mode
Pixel#
Bus Data
Pixel#
Bus Data
Format
IDF#
Format
IDF#
D[15]
D[14]
D[13]
D[12]
D[11]
D[10]
D[9]
D[8]
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
P0a
Cb0[7]
Cb0[6]
Cb0[5]
Cb0[4]
Cb0[3]
Cb0[2]
Cb0[1]
Cb0[0]
P0a
G0[7]
G0[6]
G0[5]
G0[4]
G0[3]
G0[2]
G0[1]
G0[0]
B0[7]
B0[6]
B0[5]
B0[4]
B0[3]
B0[2]
B0[1]
B0[0]
P0b
Y0[7]
Y0[6]
Y0[5]
Y0[4]
Y0[3]
Y0[2]
Y0[1]
Y0[0]
P0b
A0[7]
A0[6]
A0[5]
A0[4]
A0[3]
A0[2]
A0[1]
A0[0]
R0[7]
R0[6]
R0[5]
R0[4]
R0[3]
R0[2]
R0[1]
R0[0]
16-bit RGB (16-8)
P1a
Cr0[7]
Cr0[6]
Cr0[5]
Cr0[4]
Cr0[3]
Cr0[2]
Cr0[1]
Cr0[0]
2
P1a
G1[7]
G1[6]
G1[5]
G1[4]
G1[3]
G1[2]
G1[1]
G1[0]
B1[7]
B1[6]
B1[5]
B1[4]
B1[3]
B1[2]
B0[1]
B0[0]
P1b
Y1[7]
Y1[6]
Y1[5]
Y1[4]
Y1[3]
Y1[2]
Y1[1]
Y1[0]
YCrCb 8-bit
9
P1b
R1[7]
R1[6]
R1[5]
R1[4]
R1[3]
R1[2]
R1[1]
R1[0]
A1[7]
A1[6]
A1[5]
A1[4]
A1[3]
A1[2]
A1[1]
A1[0]
P2a
Cb2[7]
Cb2[6]
Cb2[5]
Cb2[4]
Cb2[3]
Cb2[2]
Cb2[1]
Cb2[0]
P2b
Y2[7]
Y2[6]
Y2[5]
Y2[4]
Y2[3]
Y2[2]
Y2[1]
Y2[0]
P3a
Cr2[7]
Cr2[6]
Cr2[5]
Cr2[4]
Cr2[3]
Cr2[2]
Cr2[1]
Cr2[0]
CH7004C
P3b
Y3[7]
Y3[6]
Y3[5]
Y3[4]
Y3[3]
Y3[2]
Y3[1]
Y3[0]
9

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