ch7301c Chrontel, ch7301c Datasheet - Page 12

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ch7301c

Manufacturer Part Number
ch7301c
Description
Ch7301 Dvi Transmitter
Manufacturer
Chrontel
Datasheet

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When IDF = 4 (YCrCb mode), the data inputs can also be used to transmit sync information to the device. In this mode,
the embedded sync will follow the VIP2 convention, and the first byte of the ‘video timing reference code’ will be
assumed to occur when a Cb sample would occur, if the video stream was continuous. This is shown below:
I n this mode, the S[7..0] byte contains the following data:
S[6]
S[5]
S[4]
Bits S[7] and S[3..0] are ignored.
12
Table 7. Embedded Sync
IDF =
Format =
Pixel #
Bus Data
=
=
=
Dx[7]
Dx[6]
Dx[5]
Dx[4]
Dx[3]
Dx[2]
Dx[1]
Dx[0]
F
V
H
P0a
FF
FF
FF
FF
FF
FF
FF
FF
=
=
=
1 during field 2, 0 during field 1
1 during field blanking, 0 elsewhere
1 during EAV (synchronization reference at the end of active video)
0 during SAV (synchronization reference at the start of active video)
P0b
00
00
00
00
00
00
00
00
P1a
00
00
00
00
00
00
00
00
P1b
S[7]
S[6]
S[5]
S[4]
S[3]
S[2]
S[1]
S[0]
YCrCb 8-bit
4
P2a
Cb2[7]
Cb2[6]
Cb2[5]
Cb2[4]
Cb2[3]
Cb2[2]
Cb2[1]
Cb2[0]
201-0000-056
P2b
Y2[7]
Y2[6]
Y2[5]
Y2[4]
Y2[3]
Y2[2]
Y2[1]
Y2[0]
P3a
Cr2[7]
Cr2[6]
Cr2[5]
Cr2[4]
Cr2[3]
Cr2[2]
Cr2[1]
Cr2[0]
Rev. 1.32,
CH7301C
P3b
Y3[7]
Y3[6]
Y3[5]
Y3[4]
Y3[3]
Y3[2]
Y3[1]
Y3[0]
5/24/2005

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