ch7304 Chrontel, ch7304 Datasheet - Page 24

• Manufacturer Part Number: ch7304
• Description: Ch7304 Single Channel Lvds Transmitter
• Manufacturer: Chrontel

CHRONTEL
LVDS Power Down
LODPDB[1:0] (bits 1-0) of Register LPD control the LVDS Output Power Down per the following table:
Note:
LPPRB (bit 2) of Register LPD controls the LVDS PLL Reset.
LPPDN (bit 3) of Register LPD controls the LVDS PLL Power Down.
LPLF[2:0] (bits 6-4) of Register LPD control the LVDS PLL Loop Filter Resistor per the following table:
The recommended setting is shown in Table 15 in Section 0.
FRSTB (bit 7) of Register LPD controls the FIFO reset.
24
DEFAULT:
SYMBOL:
LPPRB
LPPDN
FRSTB
TYPE:
BIT:
Outputs are tri-stated in power down mode unless LODP (Register 74h, bit 7) is ‘1’, in which case outputs are
pulled to ground.
Table 13: LVDS Output Power Down
LODPDB0
Table 14: LVDS PLL Loop Filter Resistor
LPLF2
FRSTB
= 0 =>
= 1 =>
= 0 =>
= 1 =>
= 0 =>
= 1 =>
R/W
0
1
1
7
0
0
0
0
1
1
1
1
LVDS PLL is reset
Normal operation
LVDS PLL is powered down
Normal operation
Enable FIFO Reset
Normal Operation
LDC[3:0] , LLC & LLC* path
Power Down
Power On
LPLF1
LPLF2
R/W
6
0
0
0
1
1
0
0
1
1
LPLF0
LPLF1
R/W
5
1
0
1
0
1
0
1
0
1
PLL Loop Filter Resistor Value (Ohm)
LPLF0
R/W
0
4
LPPDN
R/W
3
1
21,800
42,600
11,000
73,200
1800
2600
1000
3200
201-0000-053
Symbol:
Address:
LPPRB
R/W
2
1
Reserved
Rev. 1.31,
LPD
76h
R/W
1
0
CH7304
LODPDB0
6/14/2006
R/W
0
1