h8s-2138 Renesas Electronics Corporation., h8s-2138 Datasheet - Page 195
h8s-2138
Manufacturer Part Number
h8s-2138
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2138.pdf
(1061 pages)
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Bit 4—Burst Cycle Select 1 (BRSTS1): Selects the number of burst cycles for the burst ROM
interface.
Bit 3—Burst Cycle Select 0 (BRSTS0): Selects the number of words that can be accessed in a
burst ROM interface burst access.
Bit 2—Reserved: Do not write 0 to this bit.
Bits 1 and 0—IOS Select 1 and 0 (IOS1, IOS0): See table 6.4.
6.2.2
WSCR is an 8-bit readable/writable register that specifies the data bus width, number of access
states, wait mode, and number of wait states for external memory space. The on-chip memory and
internal I/O register bus width and number of access states are fixed, irrespective of the WSCR
settings.
WSCR is initialized to H'33 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 4
BRSTS1
0
1
Bit 3
BRSTS0
0
1
Bit
Initial value
Read/Write
Wait State Control Register (WSCR)
Description
Burst cycle comprises 1 state
Burst cycle comprises 2 states
Description
Max. 4 words in burst access
Max. 8 words in burst access
RAMS
R/W
7
0
RAM0
R/W
6
0
ABW
R/W
5
1
AST
R/W
4
1
Rev. 4.00 Jun 06, 2006 page 141 of 1004
WMS1
R/W
3
0
WMS0
R/W
2
0
Section 6 Bus Controller
WC1
R/W
REJ09B0301-0400
1
1
(Initial value)
(Initial value)
WC0
R/W
0
1
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