MG84FL54BD MEGAWIN [Megawin Technology Co., Ltd], MG84FL54BD Datasheet - Page 77

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MG84FL54BD

Manufacturer Part Number
MG84FL54BD
Description
Full-Speed USB micro-controller
Manufacturer
MEGAWIN [Megawin Technology Co., Ltd]
Datasheet
20.1. Description for ISP Operation
Before doing ISP operation, the user should fill the bits XCKS4~XCKS0 in CKCON register with a proper value.
(Refer to Section “System Clock”.)
To do Page Erase (64 Bytes per Page)
Step1: Set [MS1,MS0]=[1,1] in ISPCR register to select Page Erase Mode.
Step2: Fill page address in IFADRH & IFADRL registers.
Step3: Sequentially write 0x46 then 0xB9 to SCMD register to trigger an ISP processing.
To do Byte Program
Step1: Set [MS1,MS0]=[1,0] in ISPCR register to select Byte Program Mode.
Step2: Fill byte address in IFADRH & IFADRL registers.
Step3: Fill data to be programmed in IFD register.
Step4: Sequentially write 0x46 then 0xB9 to SCMD register to trigger an ISP processing.
To do Read
Step1: Set [MS1,MS0]=[0,1] in ISPCR register to select Read Mode.
Step2: Fill byte address in IFADRH & IFADRL registers.
Step3: Sequentially write 0x46 then 0xB9 to SCMD register to trigger an ISP processing.
Step4: Now, the Flash data is in IFD register.
MEGAWIN
MG84FL54B Data sheet
77

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