MG84FL54BD MEGAWIN [Megawin Technology Co., Ltd], MG84FL54BD Datasheet - Page 84

• Manufacturer Part Number: MG84FL54BD
• Description: Full-Speed USB micro-controller
• Manufacturer: MEGAWIN [Megawin Technology Co., Ltd]

OR3 (Option Register 3)
WDTCR_WP:
PSMEN:
HWENW: (accompanied with arguments HWWIDL and HWPS[2:0]):
84
WDTCR_WP
0 (enabled):
1 (disabled): The register WDTCR can be freely written by software.
0 (enabled): Power saving mode enable
1 (disable): Power saving mode disable
0 (enabled): Automatically enable Watch-dog Timer by hardware when MCU is powered up.
1 (disabled): No action on Watch-dog Timer when MCU powered up.
If CPU runs in AP-memory, the register WDTCR will be software-write-protected except the bit CLRW.
If CPU runs in ISP-memory, the register WDTCR will be software-write-protected except the bits CLRW,
PS2, PS1 and PS0.
It means that:
For example:
7
-
7
In the WDTCR register, H/W will automatically
(1) set ENW bit,
(2) load HWWIDL into WIDL bit, and
(3) load HWPS[2:0] into PS[2:0] bits.
If HWWIDL and HWPS[2:0] are programmed to be 1 and 5, respectively, then WDTCR will be
Initialized to be 0x2D when MCU is powered up, as shown below.
6
-
6
-
HWENW
5
5
-
PSMEN
MG84FL54B Data Sheet
4
4
-
HWWIDL
3
3
-
HWPS2
2
2
-
HWPS1
1
1
-
HWPS0
0
0
-
MEGAWIN